Partitioned Display Substrate Signal Control

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Solution Overview

Problem

Current display technologies face challenges in efficiently managing signal control for flexible displays using Organic Light Emitting Diodes (OLED) or Quantum-dot Light Emitting Diodes (QLED) as light emitting devices, particularly in optimizing the arrangement and connectivity of transistors and signal lines within the display substrate.

Innovation Solution

The proposed solution involves a display substrate with a specific arrangement of pixel circuits, light emitting driving circuits, control driving circuits, and reset driving circuits. The substrate is divided into partitions along a first direction, with each partition containing a set of pixel circuits connected to corresponding driving circuits. This arrangement includes a unique configuration of scan signal lines, light emitting signal lines, and clock signal lines to facilitate efficient signal control and data writing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the display substrate uses a conventional single-group driving circuit arrangement, then the circuit layout is simple, but the signal control efficiency is insufficient and the bezel width cannot be reduced

Engineering Contradiction:
Improvesignal control efficiencyVSAvoidcircuit arrangement complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent divides the display area into multiple partitions along the first direction, with each partition independently controlled by corresponding driving circuits. This segmentation allows parallel processing of signal control for different partitions, improving overall signal control efficiency while distributing the circuit complexity across multiple independent modules rather than concentrating it in a single complex arrangement

Inventive Principle:
Principle #1Segmentation

2Speed

If multiple signal lines are arranged in a conventional manner, then the layout is straightforward, but the data writing speed is limited

Engineering Contradiction:
Improvedata writing speedVSAvoidsignal line configuration complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent introduces a multi-directional signal line configuration where signal lines extend along both the first direction (across partitions) and the second direction (within partitions). This two-dimensional signal line arrangement enables simultaneous data writing to multiple partitions and multiple pixel rows, significantly increasing data writing speed compared to conventional single-direction scanning

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Productivity

If the display substrate adopts a partitioned structure with multiple driving circuits, then the signal control efficiency improves, but the manufacturing complexity increases

Engineering Contradiction:
Improvedata writing efficiencyVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

Each partition is equipped with dedicated driving circuits and signal lines tailored to its specific requirements, allowing independent optimization and testing of each partition. This local quality approach enables modular manufacturing where partitions can be produced and tested separately, reducing overall manufacturing complexity despite the increased number of components

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12223900B2Display substrate and display apparatus
Publication Date: 2025.02.11 HEFEI BOE ZHUOYIN TECH CO LTD
  • US12223900B2 patent drawing
  • US12223900B2 patent drawing
  • US12223900B2 patent drawing

AI summary

A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.