Logic Circuitry with Partitioned Memory for Secure Consumable Reuse

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing logic circuits for consumable components in devices like printers are designed for single-use and lack a secure mechanism for refilling or remanufacturing, leading to security and authentication challenges when reusing consumables.

Innovation Solution

A reconfigurable logic circuit architecture with partitioned memory and access modes allows for multiple uses, including a first use partition group and subsequent use groups, enabling secure refilling and remanufacturing by maintaining product ID and consumable level data, while preventing unauthorized tampering.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If logic circuits are designed for single-use with fixed authentication data, then security is maintained for original manufacturer controls, but the logic circuits cannot be reused after consumable depletion

Engineering Contradiction:
Improvereusability of logic circuitVSAvoidauthentication security
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The memory is divided into multiple partitions with different access modes. Some partitions are readable only by the host, while others are writable by both host and remanufacturer. This segmentation allows the logic circuit to maintain security for original authentication data while enabling controlled rewriting for remanufacturing purposes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The logic circuit transitions from a static single-use design to a dynamic multi-life cycle design. The circuit can be reconfigured through controlled memory rewriting, allowing it to adapt to multiple usage cycles while maintaining security protocols through host verification at each stage.

Inventive Principle:
Principle #15Dynamics

2Productivity

If logic circuits allow rewriting for remanufacturing, then reuse is enabled, but unauthorized tampering becomes a security risk

Engineering Contradiction:
Improveconsumable component reuseVSAvoidunauthorized tampering
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The host performs preliminary authentication and controlled rewriting operations before the logic circuit is deployed for remanufacturing. This preliminary action ensures that only authorized remanufacturing operations can modify the circuit, preventing unauthorized tampering while enabling legitimate reuse.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The host acts as an intermediary between the original manufacturer's security protocols and the remanufacturing process. The host verifies authentication data and controls the rewriting process, serving as a trusted mediator that enables reuse while maintaining security against unauthorized access.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If partitioned memory with different access modes is implemented, then secure multi-life cycle use is enabled, but device complexity increases

Engineering Contradiction:
Improvemulti-life cycle supportVSAvoidmemory partition structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The partitioned memory structure serves multiple functions: storing original authentication data, storing remanufacturer-written data, and maintaining access control information. This multi-functionality justifies the increased complexity by enabling both security and reusability within a single integrated structure.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12425231B2Logic circuitry
Publication Date: 2025.09.23 HEWLETT PACKARD DEVELOPMENT COMPANY LP
  • US12425231B2 patent drawing
  • US12425231B2 patent drawing
  • US12425231B2 patent drawing

AI summary

A logic circuit, or method using the same, may include a memory storing (i) a plurality of partition groups, each partition group including a plurality of partitions, and (ii) a partition map defining an address and access mode for each of said partitions, defining different access modes for at least some of the partitions. The plurality of partition groups may comprise (i) a general use partition group including a first consumable level counter; (ii) a second use partition group including a second incrementally updatable consumable level counter; and (iii) a guide partition group including a use indicator to indicate which of the first and second consumable level counters to use.