Partitioned Memory Protection Unit With Shared Region Descriptors
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Solution Overview
Problem
Current memory protection units (MPUs) face limitations due to cost constraints, requiring a fixed number of region descriptors that cannot accommodate varying system needs for mapping instruction and data spaces, leading to inefficiencies and increased costs as dedicated MPUs must be sized for maximal expected access types.
Innovation Solution
A partitioned MPU with separate subsets for instruction and data access, including a shared subset that can be used for either type of access, allowing for increased flexibility and reduced costs by minimizing entry sizes and enabling configuration of region descriptors for either instruction or data access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated MPUs are sized for maximal expected needs for instruction or data accesses, then reliability is improved, but device complexity and cost increase
Solution Approach 1:
The patent implements a shared subset of region descriptors that can be dynamically configured to handle either instruction accesses or data accesses. This multi-functional approach allows the same hardware resources to serve multiple purposes, eliminating the need for separate dedicated MPUs for instruction and data spaces, thereby reducing device complexity while maintaining reliable memory protection
2Device complexity
If the total number of region descriptors is limited due to cost issues, then device complexity is reduced, but adaptability deteriorates
Solution Approach 1:
The patent introduces dynamic configurability to the region descriptors through a shared subset that can be allocated to either instruction or data access modes based on system needs. This dynamic allocation mechanism allows the MPU to adapt its functionality without requiring additional hardware resources, thus maintaining low device complexity while significantly improving adaptability to varying system requirements
Data Source
AI summary
In a disclosed embodiment, a data processing system comprises a memory protection unit (MPU); and a plurality of region descriptors associated with the MPU. Each region descriptor is associated with one of multiple subsets of the region descriptors and includes an address range, protection settings, and attributes for a respective region of memory. The subsets include data-only region descriptors, instruction-only region descriptors, and shared region descriptors. The shared region descriptors are used to access memory regions for data and instruction memory requests.