Partitioned Memory Error Correction via Snapshot Copyback

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Solution Overview

Problem

In memory sub-systems, especially in autonomous vehicles and IoT devices, there is a significant gap between total bytes written and user capacity, leading to high error rates during data transfer from one memory portion to another without external controller intervention, resulting in data corruption.

Innovation Solution

A memory sub-system with an error correction component that performs error correction operations on a sample of data within the memory and then performs a copyback operation to move corrected data from a buffer memory portion to a snapshot memory portion, reducing errors and energy consumption by minimizing external controller involvement.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If data is transferred from one memory portion to another without external controller intervention, then energy consumption is reduced and transfer speed is improved, but error rate increases and data corruption occurs

Engineering Contradiction:
Improveenergy consumptionVSAvoiderror rate
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The memory sub-system performs error correction operations autonomously without requiring external controller intervention. The error correction component is integrated within the memory sub-system itself, allowing it to detect and correct errors during internal data transfers between memory portions, thus maintaining reliability while keeping the system self-sufficient and energy-efficient

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The memory sub-system is divided into multiple memory portions (first memory portion and second memory portion) with an error correction component that operates independently on data during transfer. This segmentation allows error correction to be performed on specific data portions without involving the entire memory system or external controllers, reducing overall energy consumption while maintaining data integrity

Inventive Principle:
Principle #1Segmentation

2Reliability

If error correction operations are performed on all data during transfer, then data reliability is improved, but energy consumption increases and transfer time increases

Engineering Contradiction:
Improvedata integrityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

Instead of performing error correction operations on all data during transfer, the system performs error correction on a sample of the data or uses error correction codes that operate selectively. This partial action approach maintains adequate data integrity while significantly reducing the energy consumption and transfer time overhead associated with comprehensive error correction

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If external controller intervention is used for error correction, then data reliability is improved, but device complexity and energy consumption increase

Engineering Contradiction:
Improveerror detection capabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The error correction functionality is extracted from the external controller and integrated directly into the memory sub-system. This extraction eliminates the need for complex external controller intervention while maintaining error detection and correction capabilities, thereby reducing overall system complexity and energy consumption without sacrificing data reliability

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS12026052B2Partitioned memory having error detection capability
Publication Date: 2024.07.02 LODESTAR LICENSING GROUP LLC
  • US12026052B2 patent drawing
  • US12026052B2 patent drawing
  • US12026052B2 patent drawing

AI summary

A memory component comprises a cyclic buffer partition portion and a snapshot partition portion. In response to receiving a signal that a trigger event has occurred, a processing device included in the memory component performs an error correction operation on a portion of data stored in the cyclic buffer partition portion, copies the data stored in the cyclic buffer partition portion to the snapshot partition portion in response to the error correction operation being successful, and sends the data stored in the cyclic buffer partition portion to a processing device operatively coupled to the memory component in response to the error correction operation not being successful.