Partitioned Soft Programming for NAND Flash Memory Cells
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Solution Overview
Problem
Traditional erase operations in NAND type flash memory systems often result in disparate erase rates among memory cells, leading to over-erasure and reduced cycling life, as well as inconsistent threshold voltages, due to capacitive coupling effects and differing bias conditions.
Innovation Solution
The solution involves dividing memory cells into subsets and applying erase and soft programming pulses under specific bias conditions to normalize the capacitive coupling effects, ensuring each memory cell experiences similar bias conditions during erase and soft programming operations, thereby achieving consistent erase and programming rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional erase operations are applied to NAND flash memory cells, then erase operation can be performed, but disparate erase rates among memory cells occur leading to over-erasure and reduced cycling life
Solution Approach 1:
The patent divides the memory cell array into multiple subsets (e.g., even and odd subsets) and performs erase operations on each subset separately with different bias conditions. This segmentation allows each subset to be erased at optimized rates, preventing over-erasure of faster-erasing cells while ensuring complete erasure of slower cells, thereby extending cycling life without significantly compromising overall erase productivity.
Solution Approach 2:
The patent applies different bias conditions to different subsets of memory cells during erase operations. Specifically, one subset receives a first bias condition while another subset receives a second bias condition, creating locally optimized erase conditions for each subset. This local quality adjustment ensures uniform erase characteristics across all cells, preventing over-erasure and extending device cycling life.
2Productivity
If traditional erase operations are applied to NAND flash memory cells, then erase operation can be performed, but inconsistent threshold voltages occur among memory cells
Solution Approach 1:
The patent segments the memory cell array into multiple subsets and applies different bias conditions to each subset during erase operations. This segmentation enables precise control over the erase process for each subset, ensuring that all cells reach a consistent threshold voltage state without over-erasure, thereby improving threshold voltage uniformity while maintaining erase efficiency.
Solution Approach 2:
The patent changes the bias conditions (voltage parameters) applied to different subsets of memory cells during erase operations. By adjusting these electrical parameters locally for each subset, the patent achieves consistent threshold voltage distribution across all memory cells, resolving the inconsistency problem while maintaining overall erase productivity.
3Manufacturing precision
If soft programming is applied to memory cells, then threshold voltage distribution can be improved, but disparate soft programming rates occur among memory cells
Solution Approach 1:
The patent divides memory cells into subsets and applies different bias conditions during soft programming operations. This segmentation allows each subset to be soft-programmed at optimized rates, ensuring uniform soft programming rates across all cells while achieving the desired threshold voltage distribution improvement.
Solution Approach 2:
The patent applies locally optimized bias conditions to different subsets of memory cells during soft programming. This local quality adjustment ensures that each subset experiences appropriate programming conditions, resulting in consistent soft programming rates and improved threshold voltage distribution across the entire memory array.
4Reliability
If partitioned erase and soft programming operations are implemented, then uniform erase and programming rates are achieved, but device complexity increases
Solution Approach 1:
The patent segments the memory cell array into subsets that can be controlled through existing word line structures. This segmentation approach leverages existing device architecture, minimizing the increase in device complexity while achieving uniform erase and programming rates through subset-based control.
Solution Approach 2:
The patent designs the bias control mechanism to serve multiple functions: it controls both erase and soft programming operations across different subsets. This multi-functionality reduces the need for separate complex control circuits for each operation, thereby limiting the increase in device complexity while achieving rate uniformity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach ensures more uniform erase and soft programming rates across all memory cells, reducing the risk of over-erasure and extending the cycling life of memory cells by maintaining consistent threshold voltages.
Implementation Method 1
electrons are transferred from the floating gate of each memory cell to the well region
Implementation Method 2
capacitive coupling effects and differing bias conditions
Implementation Method 3
Soft programming raises the threshold voltage of the memory cells in order to narrow and/or raise the threshold voltage distribution
Data Source
AI summary
Soft programming is performed to narrow the threshold voltage distribution of a set of erased memory cells. Soft programming can shift the threshold voltage of memory cells closer to a verify level for the erased state. A set of memory cells can be soft programmed by soft programming portions of the set to provide more consistent soft programming rates and threshold voltages. A first soft programming pulse can be applied to a first group of cells of the set while inhibiting soft programming of a second group of cells. A second soft programming pulse can then be applied to the second group of cells while inhibiting soft programming of the first group of cells. A small positive voltage of lower magnitude than the soft programming pulses can be applied to the group of cells to be inhibited. The size of the small positive voltage can be chosen so that each memory cell of the set will experience similar capacitive coupling effects from neighboring transistors when it is undergoing soft programming.