Partitioned Store Queue for Vector Processor Throughput
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional semiconductor systems lack efficient store queue management for vector processors, leading to inefficiencies in throughput, silicon area, and power consumption due to the exponential growth of store queues with deeper pipelines and wider SIMD widths, which results in stalls and increased complexity.
Innovation Solution
Implement a partitioned store queue engine with a control store queue and a data store queue, along with a load data stall extension, to manage store operations efficiently, ensuring sustained throughput and optimized silicon area usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the store queue size is increased to handle deeper pipelines and wider SIMD widths, then the throughput capability is improved, but the silicon area and power consumption increase exponentially
Solution Approach 1:
The store queue is divided into two separate queues: a control store queue for managing control information and a data store queue for managing actual data. This segmentation allows each queue to be optimized independently for its specific function, reducing the overall silicon area required while maintaining the throughput capability needed for deep pipelines and wide SIMD operations.
2Productivity
If the store queue size is increased to prevent stalls, then the productivity is improved, but the device complexity increases
Solution Approach 1:
By segmenting the store queue into control and data portions, the patent simplifies the management logic. The control store queue handles allocation and deallocation of control entries, while the data store queue handles data buffering. This separation reduces the complexity of managing a single large queue compared to managing two smaller, specialized queues.
3Reliability
If the store queue size is increased to maintain data ordering, then the reliability is improved, but the silicon area increases
Solution Approach 1:
The control store queue ensures data ordering by managing control entries that track the sequencing of store operations. This specialized control queue maintains reliability without requiring a large data buffer, as the ordering is enforced through control logic rather than queue size.
Solution Approach 2:
The control store queue acts as an intermediary between the instruction fetch unit and the data store queue. It mediates the allocation and deallocation of data store queue entries, ensuring that data is written in the correct order while using minimal silicon area for the control information.
Data Source
AI summary
Methods, systems, and devices for providing partitioned store queue management using a partitioned store queue engine of a semiconductor system are described. Partitioned store queue management can refer to hardware-based techniques associated with a store queue architecture that helps managing memory operations, including storing of data to memory. Hardware-based techniques are employed to handle store instructions in a processor pipeline. In operation, a control store queue entry is allocated in a control store queue of a partitioned store queue when a store instruction is in a decode-dispatch stage. A data store queue entry is allocated when the store instruction in a memory stage of the processor pipeline. The data store queue is freed up when the data is ready in the data store queue entry. The control queue entry and data store queue entry is deallocated when the store instruction is in a write back stage of the processor pipeline.