Partitioning Secure Computation Circuits for Multi-Processor Execution
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Solution Overview
Problem
Sequential secure computation code, such as fully homomorphic encryption (FHE) code, is slow to execute and difficult to parallelize, making it inefficient on multiple processors, especially when manual parallelization is error-prone and costly.
Innovation Solution
A system that obtains a circuit describing operations of sequential secure computation code, modifies it based on a cost function, partitions it into sub-circuits, and assigns these sub-circuits to different processors for concurrent execution, using techniques like gradient descent algorithms and constrained optimization to minimize running time and data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If sequential secure computation code is executed on multiple processors, then execution speed can be improved, but the code is difficult to parallelize and requires manual parallelization which is error-prone and costly
Solution Approach 1:
The patent segments the sequential secure computation code into discrete circuit operations that can be independently executed. By representing the computation as a circuit with distinct gates and operations, the code is divided into parallelizable units that can be assigned to multiple processors without manual intervention.
Solution Approach 2:
The patent introduces an intermediary compilation process that automatically transforms sequential code into a circuit representation and generates parallel execution plans. This intermediary layer handles the complexity of parallelization, shielding developers from errors while enabling multi-processor execution.
2Loss of time
If manual parallelization is performed to speed up execution, then running time is reduced, but it requires time and money and is error prone
Solution Approach 1:
The patent implements self-service parallelization where the compilation system automatically analyzes the circuit representation of secure computation code and generates optimal parallel execution strategies without human intervention. The system serves itself by identifying parallelizable operations and distributing them across processors.
Solution Approach 2:
The patent changes the representation parameters of the code from sequential instructions to circuit-based operations with explicit data dependencies. This parameter change enables automatic analysis of parallelization opportunities and facilitates efficient distribution across multiple processors.
3Ease of operation
If sequential secure computation code is used, then implementation is straightforward, but execution is slow and inefficient
Solution Approach 1:
The patent introduces dynamic parallelization where the system adapts the execution strategy based on the circuit structure and available processors. The compilation process dynamically determines the optimal parallel execution plan, maintaining ease of implementation while achieving high execution efficiency.
Data Source
AI summary
An example system includes a processor that can obtain a circuit describing operations of sequential secure computation code. The processor can modify the circuit based on a cost function. The processor can partition the circuit into a number of sub-circuits. The processor can assign the number of the sub-circuits to different processors for execution.