Pass-Gate PMOS Wake-Up Path for Memory Power Domains
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Solution Overview
Problem
Traditional power management in SRAM devices results in high peak wake-up current due to simultaneous activation of peripheral circuits across different power domains, leading to design complexities and increased area requirements.
Innovation Solution
Implementing a pass-gate PMOS device as a wake-up path switch across different power domains to achieve a sequential wake-up path for peripheral circuits, reducing peak current by gradually turning on subsets of peripheral circuits instead of activating them all at once.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If peripheral circuits across different power domains are activated simultaneously during wake-up mode, then all circuits become operational quickly, but peak wake-up current increases significantly
Solution Approach 1:
The patent segments the wake-up activation process by introducing a pass-gate PMOS device that selectively controls power delivery to different power domains. Instead of simultaneous activation, the pass-gate enables sequential or controlled activation of peripheral circuits across power domains, dividing the wake-up process into manageable stages that limit peak current while maintaining operational speed.
2Power
If separate wake-up paths are implemented for different power domains to reduce peak current, then peak wake-up current is reduced, but design complexity and area requirements increase
Solution Approach 1:
The patent merges the wake-up control functionality into a single pass-gate PMOS device that interfaces between power domains. This unified approach eliminates the need for separate complex wake-up paths for each power domain, reducing overall design complexity and area requirements while still achieving peak current reduction through controlled power delivery.
Solution Approach 2:
The pass-gate PMOS device serves multiple functions simultaneously: it acts as a power switch, a domain interconnect, and a wake-up controller. This multi-functional element replaces what would otherwise require multiple dedicated circuits, simplifying the design while achieving the desired current reduction across different power domains.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces peak wake-up current and design complexity by allowing subsets of peripheral circuits to be switched to wake-up mode simultaneously, without the need for additional metal routing or control logic, thereby conserving power and improving memory device efficiency.
Implementation Method 1
Implementing a pass-gate PMOS device as a wake-up path switch across different power domains
Data Source
AI summary
A memory device includes an array of memory cells and a plurality of peripheral circuits operably coupled to the memory array. A power control circuit may be configured to individually control an application of power to each of the plurality of peripheral circuits and the array of memory cells. Inserting a switch device across the different power domains to achieve the same sequential wake-up path for the peripheral circuits connected to different power domains reduces peak current.