Pass-through vias for high-density multi-chip stack routing
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Solution Overview
Problem
High density packaging of integrated circuit devices is limited by the need for wide spacing regions between chips to prevent damage during dicing, which reduces the number of chips that can be obtained from a wafer.
Innovation Solution
The integration of first and second integrated circuit devices on a semiconductor substrate with via holes and rerouting conductors that extend between the devices, allowing for efficient signal rerouting and interchip communication without the need for wide spacing, enabling a higher density of chip placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wide spacing regions are provided between chips to prevent damage during dicing, then chip integrity is protected, but the number of chips per wafer decreases
Solution Approach 1:
The patent introduces via holes that extend through the substrate thickness (third dimension) to create vertical signal pathways. This allows spacing regions to be minimized in the planar area while maintaining chip integrity through the vertical dimension, effectively resolving the contradiction between spacing width and chip density.
Solution Approach 2:
Rerouting conductors are introduced as intermediary elements that bridge chip pads to via holes through the substrate. These conductors enable signal transmission across reduced spacing regions without requiring wide gaps for direct connections, thus protecting chip integrity while increasing chips per wafer.
2Ease of manufacture
If wide spacing regions are provided between chips, then signal routing is simplified, but the packaging density decreases
Solution Approach 1:
Signal routing is extended into the vertical dimension through via holes that penetrate the substrate. This multi-dimensional routing approach consolidates signal pathways, enabling higher packaging density while maintaining manufacturability through standardized via and conductor processes.
Solution Approach 2:
The via holes and rerouting conductors serve multiple functions: they provide signal pathways, enable interchip communication, and support high-density packaging. This multi-functionality eliminates the need for wide spacing dedicated solely to signal routing, thereby increasing packaging density.
3Productivity
If via holes are provided in spacing regions, then chip density increases, but manufacturing complexity increases
Solution Approach 1:
The manufacturing process is segmented into distinct steps: forming via holes in spacing regions, depositing rerouting conductors, and connecting to chip pads. This segmentation allows each step to be optimized independently, managing manufacturing complexity while achieving high chip density.
Solution Approach 2:
Via holes are formed in the substrate before chip mounting, and rerouting conductors are deposited in advance to establish signal pathways. This preliminary action simplifies subsequent assembly steps and manages manufacturing complexity by preparing the substrate structure beforehand.
Data Source
AI summary
Packaged integrated circuit devices include a package substrate and a multi-chip stack of integrated circuit devices on the package substrate. The multi-chip stack includes at least one chip-select rerouting conductor. This rerouting conductor extends from the package substrate to a chip pad on an upper one of the chips in the multi-chip stack. The chip-select rerouting conductor extends through a first via hole in a lower one of the chips in the multi-chip stack.