Passivated Tin Thermocompression Bonding for Low-Temperature 3D Stacking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional flip-chip reflow solder bonding techniques for 3D interconnects face challenges when adding subsequent chips, leading to alignment issues, thermal stress, and reliability problems due to repeated melting and thermal cycling, especially with chips of varying thermal expansion coefficients.
Innovation Solution
A low-temperature bonding process using deformable metallic bumps and surface preparation techniques like oxide reduction and passivation, allowing chips to be added without reflow, maintaining alignment and reliability through controlled bond height and force.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional reflow solder bonding is used to add subsequent chips, then electrical and mechanical connections are formed, but alignment accuracy deteriorates and thermal stress increases due to repeated melting and thermal cycling
Solution Approach 1:
The patent changes the bonding temperature parameter from conventional reflow temperatures (above solder melting point) to low temperatures (below solder melting point, typically room temperature to 150°C). This parameter change allows subsequent chip additions without remelting previous solder joints, thereby maintaining alignment accuracy while still forming reliable connections through solid-state diffusion and metallurgical bonding of the contacting metals
Solution Approach 2:
The patent replaces the thermal-melting mechanism with a mechanical compression and solid-state bonding mechanism. By applying controlled compression force to deform the bumped contacting metal and create intimate contact with the contact metal, reliable bonds are formed without requiring thermal cycling above the solder melting point, thus avoiding alignment degradation from repeated reflow
2Productivity
If repeated solder reflow cycles are performed for adding multiple chips, then subsequent interconnects are formed, but energy consumption increases and thermal stress degrades components
Solution Approach 1:
The patent changes the temperature parameter from high (reflow temperatures above solder melting point, typically 200-250°C) to low (below solder melting point, typically room temperature to 150°C). This eliminates the need for repeated high-energy thermal cycles while maintaining the ability to form reliable interconnects through solid-state bonding, significantly reducing energy consumption for multi-chip assembly
Solution Approach 2:
The patent substitutes the high-energy thermal melting process with a low-energy mechanical compression process. By applying controlled force to deform the bumped contacting metal into intimate contact with the contact metal, bonds are formed through solid-state diffusion and metallurgical bonding, avoiding the high energy input required for repeated solder reflow cycles
3Adaptability or versatility
If chips with differing CTE are bonded using repeated thermal cycling, then multi-material integration is achieved, but built-in stress and fatigue reliability worsen
Solution Approach 1:
The patent changes the temperature parameter from high (above solder melting point) to low (below solder melting point), eliminating the thermal expansion and contraction cycles that cause built-in stress in multi-CTE chip assemblies. This allows integration of chips with differing coefficients of thermal expansion without inducing fatigue-damaging stress cycles, maintaining reliability while achieving material versatility
Solution Approach 2:
The patent replaces the thermal-melting-bonding mechanism with a mechanical compression and solid-state bonding mechanism. This substitution eliminates the thermal cycling that causes differential expansion and contraction in multi-CTE assemblies, preventing built-in stress accumulation and fatigue failure while still enabling reliable bonding of dissimilar materials through direct metallurgical contact
4Reliability
If oxide layers are present on contacting metals, then native oxidation protection is maintained, but adhesion and conductance deteriorate
Solution Approach 1:
The patent applies preliminary action by treating the contacting metal surfaces with plasma or chemical reduction processes before bonding to remove native oxide layers. This preliminary oxide removal ensures clean, oxide-free contact surfaces that will form strong adhesive bonds and low-resistance electrical contacts, while the subsequent low-temperature bonding process prevents re-oxidation, maintaining both adhesion quality and oxidation resistance
Solution Approach 2:
The patent replaces the thermal-melting process with mechanical compression and solid-state bonding, which occurs at low temperatures below the solder melting point. This temperature regime prevents re-oxidation of the cleaned contacting metal surfaces during bonding, maintaining adhesion quality and electrical conductance without requiring high-temperature reflow that would promote oxide formation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables reliable, high-throughput 3D chip stacking with improved alignment accuracy, reduced thermal stress, and energy consumption, while providing broad design flexibility and controlled interconnect formation.
Implementation Method 1
directing plasma-activated radical-enriched gas flow at substantially atmospheric pressure both to first contacting metallizations on a first element and also to second contacting metallizations on a second element, both to reduce native oxides from said contacting metallizations
Implementation Method 2
passivate said contacting metallizations against re-oxidation
Implementation Method 3
compressing said first and second contacting metallizations together, without any conductive liquid phase material, to thereby bond said second element to said first element
Implementation Method 4
compressing said deformable bumped contacting metallization and said contacted contacting metallization together to thereby bond the second element to the first element
Data Source
AI summary
Methods and systems for low-force, low-temperature thermocompression bonding. The present application teaches new methods and structures for three-dimensional integrated circuits, in which cold thermocompression bonding is used to provide reliable bonding. To achieve this, reduction and passivation steps are preferably both used to reduce native oxide on the contact metals and to prevent reformation of native oxide, preferably using atmospheric plasma treatments. Preferably the physical compression height of the elements is set to be only enough to reliably achieve at least some compression of each bonding element pair, compensating for any lack of flatness. Preferably the thermocompression bonding is performed well below the melting point. This not only avoids the deformation of lower levels which is induced by reflow techniques, but also provides a steep relation of force versus z-axis travel, so that a drastically-increasing resistance to compression helps to regulate the degree of thermocompression.