Crystalline Passivation Layer for III Nitride Dislocation Reduction
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Solution Overview
Problem
Existing methods for manufacturing semiconductor structures based on III nitrides, such as gallium nitride on substrates, face high through-dislocation densities due to lattice parameter differences, leading to increased leakage currents and reduced luminescence efficiency in light-emitting devices. Additionally, the use of nano-mask techniques for reducing dislocations is time-consuming and lacks a generic process for determining optimal deposition parameters.
Innovation Solution
A method involving the deposition of a crystalline passivation layer that covers the entire surface of the III nitride semiconductor structure, preventing oxidation and allowing for subsequent growth without the need for empirical optimization of nanoporous layer deposition, with the passivation layer being in epitaxial relationship and having a hexagonal periodic arrangement rotated by 30° with respect to the nitride layer lattice, promoting further growth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a nano-mask layer of silicon nitride is deposited to reduce dislocation density, then dislocation density is reduced, but the process becomes time-consuming and requires empirical optimization
Solution Approach 1:
The invention changes the deposition parameters by using plasma-enhanced chemical vapor deposition (PECVD) at lower temperatures (200-400°C) with specific silicon and nitrogen flow ratios, enabling controlled formation of the nano-mask layer without requiring time-consuming empirical optimization. The plasma enhancement allows for precise control of the deposition rate and layer properties.
Solution Approach 2:
The invention replaces the mechanical/chemical trial-and-error optimization process with a plasma-based deposition system that uses electromagnetic fields to control the deposition. The PECVD process substitutes empirical parameter tuning with plasma chemistry control, where the plasma environment enables predictable and repeatable formation of the nano-mask layer with desired properties.
2Manufacturing precision
If the coverage rate of SiNx layer is increased to reduce through dislocations, then dislocation density is reduced, but the thickness of GaN required for coalescence increases
Solution Approach 1:
The invention optimizes the silicon nitride layer coverage rate and deposition parameters to achieve an optimal balance. By controlling the plasma power, precursor flow rates, and deposition temperature, the process creates a nano-mask layer with optimal coverage that effectively blocks dislocations while maintaining reasonable GaN coalescence thickness requirements.
3Productivity
If conventional deposition methods are used for GaN layer, then high dislocation density occurs, but device performance is degraded
Solution Approach 1:
The invention introduces a silicon nitride nano-mask layer as an intermediary between the substrate and the GaN layer. This intermediate layer acts as a dislocation filter, blocking the propagation of dislocations from the substrate into the GaN layer, thereby enabling high-productivity manufacturing while maintaining low dislocation density in the final device structure.
Solution Approach 2:
The invention applies local quality by creating a nano-mask layer with specific local properties (nanoscale porosity and coverage) that selectively interacts with dislocations. The layer has different properties at different scales: it appears continuous at the macro scale for effective dislocation blocking, but has nanoscale features that allow controlled GaN growth through specific mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces dislocation densities, prevents oxidation, and allows for the storage and handling of semiconductor structures before additional layer deposition, enabling a more efficient and generic manufacturing process for III nitride-based devices.
Implementation Method 1
a crystalline layer which covers the entire surface of a layer based on nitrides of elements III of the semiconductor structure... The crystalline layer is in epitaxial relationship with the layer based on element III nitrides
Implementation Method 2
deposited from silicon and nitrogen atoms, and has silicon and nitrogen atoms bonded to the surface of the layer based on element III nitride
Data Source
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AI summary
The invention relates to a method for producing a semiconductor structure, characterised in that the method comprises a step (201) of depositing a crystalline passivation layer continuously covering the entire surface of a layer based on group III nitrides, said crystalline passivation layer, which is deposited from a precursor containing silicon atoms and a flow of nitrogen atoms, consisting of silicon atoms bound to the surface of the layer based on group III nitrides and arranged in a periodical arrangement such that a diffraction image of said crystalline passivation layer obtained by the grazing-incidence diffraction of electrons in the direction [1 -100] comprises: two non-whole diffraction beams (0, -1/3) and (0, -2/3) between the central beam (0, 0) and the whole beam (0, -1), and two non-whole diffraction beams (0, 1/3) and (0, 2/3) between the central beam (0, 0) and the whole beam (0, 1).