Passivation Layer Planarization Across Stepped DRAM Regions
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Solution Overview
Problem
The challenge of shrinking memory cell area in DRAM devices due to varying word line spacing and the resulting non-uniformity in passivation layer removal during chemical mechanical polishing, leading to equipment deterioration and increased manufacturing costs.
Innovation Solution
A method involving controlled deposition and chemical mechanical polishing processes to achieve a substantially continuous passivation layer surface with specific thickness and roughness parameters, adhering to equations (1) and (2), which enhances uniformity and reduces equipment wear.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a chemical mechanical polishing process is performed to remove the passivation layer, then the passivation layer can be removed, but the non-uniform removal amount causes equipment deterioration and increases manufacturing costs
Solution Approach 1:
The method performs preliminary actions by forming a mandrel structure and depositing a first passivation layer before the main polishing process. This preliminary structure serves as a reference for controlling the subsequent polishing depth, ensuring uniform removal across different regions (array and peripheral) and preventing equipment deterioration from excessive polishing variations.
Solution Approach 2:
The invention changes the parameter of passivation layer thickness by forming a first passivation layer with a specific thickness range (2000-2800 nm) and using it as a polishing stop layer. This parameter control ensures that the polishing process removes a consistent amount of material across different wafer regions, solving the non-uniform removal problem while controlling manufacturing costs.
2Adaptability or versatility
If the passivation layer thickness varies between array region and peripheral region, then deposition can accommodate stepped structure, but polishing uniformity deteriorates
Solution Approach 1:
The invention applies local quality by creating a first passivation layer with uniform thickness across both array and peripheral regions, regardless of the underlying stepped structure. This uniform layer serves as a standardized reference surface that enables consistent polishing depth control across different regions, solving the polishing uniformity problem while maintaining adaptability to the stepped substrate.
Solution Approach 2:
The method introduces an additional dimensional reference by forming a planar first passivation layer that spans across the stepped structure. This creates a new reference plane that eliminates the impact of the underlying height differences, allowing the polishing process to operate on a uniform surface rather than being constrained by the original stepped topology.
3Manufacturing precision
If polishing is performed to achieve continuous surface, then surface uniformity improves, but polishing pad deterioration accelerates
Solution Approach 1:
The first passivation layer is formed in advance as a sacrificial reference layer with controlled thickness. During polishing, this layer acts as a stop layer that prevents excessive material removal and pad wear. The preliminary structure enables the polishing process to achieve continuous surface uniformity while limiting the total polishing depth, thereby extending polishing pad service life.
Solution Approach 2:
The uniform first passivation layer serves as a feedback reference during the polishing process. By maintaining this layer as a polishing stop, the process automatically regulates the amount of material removed, ensuring surface continuity while preventing over-polishing that would accelerate pad deterioration. The layer thickness provides inherent feedback control for the polishing depth.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves substrate uniformity and slows down the deterioration of polishing pads, thereby reducing manufacturing costs and maintaining equipment performance.
Implementation Method 1
performing a deposition process to form a passivation layer over the array region and the peripheral region
Implementation Method 2
performing a chemical mechanical polishing process so that the passivation layer has a substantially continuous surface over the array region and the peripheral region
Data Source
AI summary
A method for manufacturing a semiconductor device is provided. The method includes: providing a substrate comprising an array region and a peripheral region, wherein the array region and the peripheral region define a stepped structure, performing a deposition process to form a passivation layer over the array region and the peripheral region; performing an etching process to remove a portion of the passivation layer over the array region; and performing a chemical mechanical polishing process so that the passivation layer has a substantially continuous surface over the array region and the peripheral region.