Passivation Layer Planarization Across Array-Peripheral Steps

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Solution Overview

Problem

The challenge in manufacturing semiconductor devices lies in achieving uniformity and reducing manufacturing costs, particularly in the chemical mechanical polishing process where the stepped structure between array and peripheral regions leads to uneven passivation layer removal, causing equipment deterioration and increased costs.

Innovation Solution

A method involving a substrate with stepped structures in array and peripheral regions, where a passivation layer is deposited and then chemically mechanically polished, adhering to specific thickness equations to ensure a continuous surface with controlled surface roughness, thereby improving uniformity and prolonging equipment life.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If chemical mechanical polishing is performed on stepped structure with passivation layer, then passivation layer is removed, but uneven removal occurs between array region and peripheral region causing equipment deterioration

Engineering Contradiction:

Improveuniformity of passivation layer removalVSAvoidequipment deterioration

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies different thickness specifications for the passivation layer in different regions: the first passivation layer has a first thickness over the array region and a second thickness over the peripheral region, where the thickness ratio is controlled within 0.7-1.3. This local differentiation ensures uniform polishing removal rates across regions with different underlying topographies, preventing equipment deterioration while maintaining manufacturing precision.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent controls the thickness parameter of the passivation layer to achieve uniform polishing. By maintaining the thickness ratio between array and peripheral regions within a specific range (0.7-1.3), the polishing process removes material at comparable rates from both regions, eliminating the uneven removal that causes equipment deterioration and improving overall manufacturing precision.

Inventive Principle:

Principle #35Parameter changes

2Shape

If passivation layer thickness is increased to cover stepped structure, then surface coverage is improved, but polishing process complexity increases

Engineering Contradiction:

Improvesurface continuityVSAvoidpolishing process complexity

Core Design Contradiction:

ShapeVSDevice complexity

Solution Approach 1:

The patent simplifies the polishing process by controlling the passivation layer thickness parameter rather than attempting to polish through varying thicknesses. By depositing the first passivation layer with controlled thickness (first thickness over array region, second thickness over peripheral region with ratio 0.7-1.3), the process achieves surface continuity while maintaining manageable polishing complexity and avoiding the need for complex multi-step polishing procedures.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances substrate uniformity and slows down the deterioration of polishing pads, reducing manufacturing costs by optimizing the chemical mechanical polishing process parameters.

Implementation Method 1

performing a deposition process to form a passivation layer over the array region and the peripheral region

Methodology Applied

Scientific EffectDeposition: Deposition (physical)

Implementation Method 2

performing a chemical mechanical polishing process so that the passivation layer has a substantially continuous surface over the array region and the peripheral region

Methodology Applied

Scientific EffectChemical mechanical polishing: Abrasion

Data Source

PatentUS20230422490A1Method of manufacturing semiconductor device having island structure

Publication Date: 2023.12.28 NAN YA TECH

AI summary

A method for manufacturing a semiconductor device is provided. The method includes: providing a substrate comprising an array region and a peripheral region, wherein the array region and the peripheral region define a stepped structure, performing a deposition process to form a passivation layer over the array region and the peripheral region; performing an etching process to remove a portion of the passivation layer over the array region; and performing a chemical mechanical polishing process so that the passivation layer has a substantially continuous surface over the array region and the peripheral region.