Multi-Layer Passivation for Crack-Resistant Semiconductor RDL

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Solution Overview

Problem

The mismatch in coefficients of thermal expansion between different materials in the redistribution layer (RDL) of semiconductor devices leads to crack formation, which can propagate and cause device failure.

Innovation Solution

A multi-layer passivation structure with a nitride-based layer having a thickness of at least 40% of the total thickness, featuring layers with specific crack-reducing properties such as Young's modulus greater than 150 GPa and fracture toughness, is used to reduce tensile stress and confine cracks within the RDL.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a redistribution layer (RDL) with different materials is formed, then electrical connection and signal routing are achieved, but coefficient of thermal expansion mismatch causes crack formation leading to device failure

Engineering Contradiction:
Improvedevice reliabilityVSAvoidcrack formation
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A passivation layer is introduced as an intermediary between the conductive feature and the external environment. This passivation layer acts as a mediator that protects the underlying conductive structure from crack propagation caused by thermal expansion mismatch, thereby improving device reliability without compromising the electrical connection function

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The passivation layer is formed using a composite structure with specific mechanical properties (Young's modulus greater than 150 GPa, fracture toughness greater than 3 MPa·m1/2). This composite material approach allows the passivation layer to withstand thermal stress and prevent crack formation while maintaining the functionality of the RDL

Inventive Principle:
Principle #40Composite materials

2Reliability

If conductive features are formed in the RDL, then electrical connection is established, but tensile stress develops causing crack propagation to the interconnection structure

Engineering Contradiction:
Improvedevice reliabilityVSAvoidtensile stress
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The passivation layer serves as a stress-absorbing intermediary that protects the conductive feature from developing excessive tensile stress. By being in direct contact with the conductive feature, the passivation layer distributes and mitigates the tensile stress that would otherwise propagate to the interconnection structure

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The passivation layer is designed with specific material parameters (Young's modulus greater than 150 GPa, fracture toughness greater than 3 MPa·m1/2, and minimum thickness of 1000 nm) to change the stress distribution characteristics. These parameter changes enable the passivation layer to effectively reduce tensile stress and prevent crack propagation

Inventive Principle:
Principle #35Parameter changes

3Reliability

If passivation layer is formed over conductive feature, then crack propagation is reduced, but device complexity increases due to additional layers

Engineering Contradiction:
Improvedevice reliabilityVSAvoidRDL structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The passivation layer is segmented into a multi-layer structure where at least one layer is made of nitride material. This segmentation allows each layer to perform specific functions - the nitride layer provides crack resistance and stress management, while other layers can provide additional protection or functional properties, achieving high reliability without excessive overall complexity

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly decreases the tensile stress in conductive features and reduces the device failure rate by confining cracks within the passivation layer, thereby enhancing the reliability of semiconductor devices.

Implementation Method 1

Young's modulus greater than 150 GPa and fracture toughness greater than 3 MPa·m1/2

Methodology Applied
Scientific EffectElasticity: Elasticity

Implementation Method 2

confine cracks within the passivation layer

Methodology Applied
Scientific EffectStress Relaxation: Stress Relaxation

Implementation Method 3

the different materials in the RDL may have different coefficients of thermal expansion

Methodology Applied
Scientific EffectThermal Expansion: Thermal Expansion

Data Source

PatentUS12068271B2Semiconductor device structure and methods of forming the same
Publication Date: 2024.08.20 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12068271B2 patent drawing
  • US12068271B2 patent drawing
  • US12068271B2 patent drawing

AI summary

A semiconductor device structure, along with methods of forming such, are described. The structure includes a substrate having one or more devices formed thereon, one or more bonding pads disposed over the substrate, and a first passivation layer disposed over the one or more bonding pads. The first passivation layer includes a first passivation sublayer having a first dielectric material, a second passivation sublayer disposed over the first passivation sublayer, and the second passivation sublayer has a second dielectric material different from the first dielectric material. The first passivation layer further includes a third passivation sublayer disposed over the second passivation sublayer, and the third passivation sublayer has a third dielectric material different from the second dielectric material. At least two of the first, second, and third passivation sublayers each includes a nitride.