Passivation Spacer for Semiconductor Via Integrity

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Solution Overview

Problem

The increase in integration density of semiconductor devices leads to a reduction in reliability, primarily due to challenges in maintaining the integrity of insulating layers and preventing oxidation during fabrication processes.

Innovation Solution

A method of fabricating semiconductor devices that involves forming a passivation spacer using an insulating material different from the interlayered insulating layer, which serves as an etch mask to create a conductive via and prevents unintended oxidation of the interlayered insulating layer, thereby enhancing the reliability of the device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If integration density is increased to improve device functionality, then device capability is improved, but reliability deteriorates due to insulating layer integrity issues and oxidation

Engineering Contradiction:

Improvedevice functionalityVSAvoiddevice reliability

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

A passivation spacer layer is introduced as an intermediary between the interlayered insulating layer and the via hole etching process. This spacer layer prevents direct exposure of the insulating layer to oxidizing environments during fabrication, thereby maintaining insulating layer integrity and preventing oxidation while allowing high integration density structures to be formed

Inventive Principle:

Principle #24Intermediary (Mediator)

2Ease of manufacture

If conventional fabrication processes are used without passivation spacer, then manufacturing simplicity is maintained, but insulating layer oxidation occurs reducing reliability

Engineering Contradiction:

Improvefabrication simplicityVSAvoidinsulating layer integrity

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The passivation spacer layer is formed in advance before the via hole etching process. This preliminary action creates a protective barrier that prevents oxidation during subsequent fabrication steps, ensuring insulating layer integrity is maintained throughout the manufacturing process without requiring complex additional steps

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of a passivation spacer made from a different insulating material helps in maintaining the integrity of the interlayered insulating layer, reducing oxidation, and ensuring the formation of a reliable semiconductor device with improved electrical connectivity and reduced permittivity.

Implementation Method 1

forming a via hole using the passivation spacer as an etch mask

Methodology Applied

Scientific EffectEtch mask:

Implementation Method 2

prevents unintended oxidation of the interlayered insulating layer

Methodology Applied

Scientific EffectOxidation prevention: Oxidation

Data Source

PatentUS11251070B2Semiconductor device including a passivation spacer and method of fabricating the same

Publication Date: 2022.02.15 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of fabricating a semiconductor device includes providing a substrate, and forming an interlayered insulating layer on the substrate. The method includes forming a preliminary via hole in the interlayered insulating layer. The method includes forming a passivation spacer on an inner side surface of the preliminary via hole. The method includes forming a via hole using the passivation spacer as an etch mask. The method includes forming a conductive via in the via hole. The passivation spacer includes an insulating material different from an insulating material included in the interlayered insulating layer.