Passive Multi-Wire Bus Comparator for ODVS Common-Mode Rejection
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Solution Overview
Problem
Existing Multi-Input Comparator (MIC) embodiments that rely on active input elements face issues with signal dynamic range and common mode rejection in Orthogonal Differential Vector Signaling (ODVS) codes, such as ENRZ, where modulation of one subchannel can present as a varying common mode offset in other subchannels.
Innovation Solution
A passive MIC embodiment using an interconnected resistor network to sum input terms before active detection, reducing detrimental effects of common mode signal variation and increasing dynamic range, by generating combinations of symbols on output nodes and utilizing differential transistor pairs for sub-channel outputs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If active input elements are used in the MIC, then the circuit can actively detect and process signals, but the dynamic range is reduced and common mode rejection is deteriorated
Solution Approach 1:
A passive resistor network is introduced as an intermediary between the multi-wire bus inputs and the active differential transistor pairs. This passive network performs the initial signal combination and summation functions without actively amplifying or processing the signals, thereby avoiding the introduction of active device noise and common mode variations. The passive intermediary preserves signal integrity while the subsequent active stage provides the necessary detection capability.
Solution Approach 2:
The conventional approach uses active elements first for signal processing followed by detection. This patent inverts the sequence by using passive resistor networks first for signal combination, then using active differential transistor pairs only for the final detection stage. This inversion allows the system to benefit from passive component stability and noise immunity while maintaining active detection capability where absolutely necessary.
2Ease of operation
If active input elements are used in the MIC, then signal processing capability is maintained, but the dynamic range is limited
Solution Approach 1:
The patent replaces active electronic signal processing (which consumes power and limits dynamic range) with passive resistive signal combination in the initial stage. The passive resistor network performs linear combination of input signals without requiring power consumption for amplification or active processing, thereby extending the usable dynamic range of the comparator while maintaining signal processing capability through the subsequent active differential stage.
3Reliability
If passive resistor network is used to sum input terms, then common mode signal variation effects are reduced and dynamic range is increased, but additional circuit components are required
Solution Approach 1:
The passive resistor network serves multiple functions simultaneously: it combines multiple input signals from the multi-wire bus, performs implicit weighting and scaling, provides impedance matching, and rejects common mode variations. This multi-functionality is achieved without requiring additional active components or complex control logic, as the resistor values themselves encode the combination weights and scaling factors needed for the ODVS code detection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The passive approach enhances the dynamic range and reduces common mode rejection issues, improving the detection of ODVS codes like ENRZ, leading to more robust and efficient data recovery in high-speed multiwire communication systems.
Implementation Method 1
generating, using an interconnected resistor network connected to the plurality of wires of the multi-wire bus, a plurality of combinations of the symbols of the codeword of the vector signaling code
Implementation Method 2
generating a plurality of sub-channel outputs using a plurality of differential transistor pairs, each differential transistor pair of the plurality of differential transistor pairs connected to a respective pair of sub-channel output nodes
Data Source
AI summary
Methods and systems are described for receiving a plurality of signals via a plurality of wires of a multi-wire bus, the plurality of signals corresponding to symbols of a codeword of a vector signaling code, generating, using an interconnected resistor network connected to the plurality of wires of the multi-wire bus, a plurality of combinations of the symbols of the codeword of the vector signaling code on a plurality of output nodes, the plurality of output nodes including a plurality of pairs of sub-channel output nodes associated with respective sub-channels of a plurality of sub-channels, and generating a plurality of sub-channel outputs using a plurality of differential transistor pairs, each differential transistor pair of the plurality of differential transistor pairs connected to a respective pair of sub-channel output nodes of the plurality of pairs of sub-channel output nodes.