Passive CMOS Frequency Divider With Parametric Noise Squeezing
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Solution Overview
Problem
Conventional frequency dividers and low noise amplifiers face challenges in minimizing power consumption and phase noise, especially at high frequencies, due to limitations in CMOS technology, and existing parametric amplifiers require high-quality inductors and varactors, making them difficult to implement in CMOS processes.
Innovation Solution
A passive CMOS frequency divider using parametric amplification with zero power consumption varactors, employing two parallel nonlinear transmission lines with MOS-varactors to achieve stable operation and broad frequency tunability, and a parametric resonant amplifier that provides phase-sensitive gain through nonlinear interaction between signal and pump, reducing noise figure by noise squeezing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If transistors are used for sustaining oscillation in injection-locked frequency dividers, then high speed operation is achieved, but power consumption increases and channel noise degrades output phase noise
Solution Approach 1:
The patent extracts and removes the transistor-based oscillation sustaining mechanism from the injection-locked frequency divider. By eliminating the transistors that sustain oscillation, the invention achieves zero power consumption while maintaining high-speed operation through the passive resonator structure alone.
Solution Approach 2:
The patent replaces expensive, power-consuming active transistor components with passive, zero-power resonator structures. The passive resonator acts as a temporary energy storage element that sustains oscillation without continuous power input, effectively using a 'disposable' energy storage approach rather than continuous power consumption.
2Speed
If transistors are used for sustaining oscillation in injection-locked frequency dividers, then high speed operation is achieved, but channel noise degrades output phase noise at large offset frequencies
Solution Approach 1:
The patent extracts and removes the transistor-based oscillation sustaining mechanism from the injection-locked frequency divider. By eliminating the transistors that sustain oscillation, the invention achieves zero power consumption while maintaining high-speed operation through the passive resonator structure alone.
3Measurement precision
If conventional parametric amplifiers are implemented, then phase-sensitive gain is achieved, but high-quality inductors and varactors are required making CMOS integration difficult
Solution Approach 1:
The patent changes the fundamental parameters of the parametric amplifier by replacing high-quality external inductors and varactors with CMOS-compatible passive resonator structures and MOS-varactors. This parameter change enables phase-sensitive gain while maintaining CMOS integrability through standard fabrication processes.
Solution Approach 2:
The patent replaces expensive, non-integrable high-quality inductors and varactors with inexpensive, CMOS-compatible passive resonator structures. This substitution achieves the same phase-sensitive gain function using materials and structures that are readily available through standard CMOS fabrication.
4Ease of operation
If source-degenerated CMOS LNA is used, then input matching is achieved without real resistors, but noise figure cannot be below 0 dB due to amplified input noise and loss in matching network
Solution Approach 1:
The patent substitutes the conventional source-degeneration resistive matching network with a parametric resonant amplification mechanism. This replacement eliminates the need for real resistors while achieving both input matching and noise figure below 0 dB through the noise squeezing effect of phase-sensitive amplification.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves low noise performance and improved phase noise characteristics, enabling efficient frequency division and amplification with reduced power consumption and noise figure, suitable for high-frequency applications in CMOS technology.
Implementation Method 1
A pump module is structured, located, programmed and/or connected to pump alternating current electrical energy to the resonator portion at a wavelength of λP
Implementation Method 2
The resonator portion is structured and/or connected to produce a signal differential standing wave having a wavelength of λS such that λP is an integral multiple of λS
Implementation Method 3
a parametric resonant amplifier that provides phase-sensitive gain through nonlinear interaction between signal and pump
Implementation Method 4
The output module is structured and/or connected to receive an output signal from the first and second transmission lines, with the output signal exhibiting noise squeezing
Implementation Method 5
a degenerate parametric amplifier can suppress one of the quadrature noise components at the expense of amplifying the other quadrature component through phase-sensitive amplification
Data Source
AI summary
A passive frequency divider in a CMOS process. More specifically, an electrical distributed parametric oscillator to realize a passive CMOS frequency divider with low phase noise. Instead of using active devices, which are the main sources of noise and power consumption, an oscillation at half of the input frequency is sustained by the parametric process based on nonlinear interaction with the input signal. For example, one embodiment is a 20 GHz frequency divider utilizing a CMOS varactor and made in a 0.13 μm CMOS process. In this embodiment: (i) without any dc power consumption, 600 mV differential output amplitude can be achieved for an input amplitude of 600 mV; and (ii) the input frequency ranged from 18.5 GHz to 23.5 GHz with varactor tuning. In this embodiment, the output phase noise is almost 6 dB lower than that of the input signal for all offset frequencies up to 1 MHz. Also, a resonant parametric amplifier with a low noise figure (NF) by exploiting the noise squeezing effect. Noise squeezing occurs through the phase-sensitive amplification process and suppresses one of two quadrature components in input noise. When the input signal is only in the direction of the non-suppressed quadrature component, squeezing can lower that NF by almost 3 dB. The resonant structure of the proposed amplifier achieves the squeezing effect using a low number of LC elements.