Passive Components in Vias for Stacked IC Power Delivery

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Solution Overview

Problem

High power processor packages require large external passive components like inductors and capacitors for voltage regulation, which occupy space and increase complexity, especially as the number of processing cores increases, and these components perform better when isolated from high-speed digital circuitry and high-density interconnection grids.

Innovation Solution

Integrating magnetic core inductors and high-density capacitors on the uncore die within a 3D-stacked processor package, allowing for a fully integrated voltage regulator and reducing the need for external components by placing them in vias or recesses on the die, thereby simplifying package design and reducing connection complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If large external passive components are used for voltage regulation, then power delivery performance is improved, but package area and connection complexity increase

Engineering Contradiction:
Improvepower delivery performanceVSAvoidpackage area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges the passive components (inductors and capacitors) with the semiconductor die structure itself. Inductors are formed using spiral patterns of conductive material within the die, and capacitors are created using stacked conductive plates separated by dielectric layers, all integrated into the same substrate as the voltage regulator circuitry. This eliminates the need for separate external passive components while maintaining power delivery performance.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent employs nested structures where passive components are embedded within the die architecture. Conductive interconnect layers are stacked in multiple tiers, with capacitors formed between adjacent layers and inductors formed using spiral traces that utilize the vertical space between layers. This nested arrangement maximizes component density within the limited die area.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If passive components are placed externally through vias and connection bumps, then Q factor is improved, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
ImproveQ factorVSAvoidconnection structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the passive components from external locations and relocates them directly onto the semiconductor die. By forming inductors and capacitors using the die's own conductive and dielectric layers, the invention eliminates the need for external mounting structures, vias, and connection bumps that would otherwise be required to attach separate passive components.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent makes the semiconductor die serve multiple functions: it acts as both the active circuit substrate and the mounting platform for passive components. The same conductive interconnect layers that route signals between transistors are also used to form inductor traces and capacitor plates, eliminating the need for dedicated passive component structures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Power

If more processing cores are added to increase power, then processing capability is improved, but the number of required passive components increases

Engineering Contradiction:
Improveprocessing powerVSAvoidnumber of passive components
Core Design Contradiction:
PowerVSQuantity of substance

Solution Approach 1:

The patent divides the voltage regulation system into multiple independent regulator modules, each serving specific cores. Each module contains its own integrated passive components formed on the die, allowing scalable configuration where the number of passive component sets matches the number of voltage regulator modules rather than requiring one large external passive component per core.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11031288B2Passive components in vias in a stacked integrated circuit package
Publication Date: 2021.06.08 INTEL CORP
  • US11031288B2 patent drawing
  • US11031288B2 patent drawing
  • US11031288B2 patent drawing

AI summary

Integrated passive components in a stacked integrated circuit package are described. In one embodiment an apparatus has a substrate, a first die coupled to the substrate over the substrate, the first die including a power supply circuit coupled to the substrate to receive power, a second die having a processing core and coupled to the first die over the first die, the first die being coupled to the power supply circuit to power the processing core, a via through the first die, and a passive device formed in the via of the first die and coupled to the power supply circuit.