Semiconductor Package Assembly with Passive Device on Die

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Solution Overview

Problem

Conventional semiconductor packages face challenges in miniaturization and multi-functionality due to complex processing steps and high fabrication costs associated with embedded passive devices, as well as space constraints from passive devices placed on the solder-ball side of the substrate.

Innovation Solution

A semiconductor package assembly where a discrete passive device is positioned directly on the semiconductor die, fully overlapping it, with the passive device's pads coupled to the semiconductor die through conductive wires, and optionally using a carrier or insulating material to manage the passive device's placement and connectivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If passive devices are embedded in the substrate, then multi-functionality is achieved, but processing complexity increases and fabrication cost increases

Engineering Contradiction:
Improvemulti-functionalityVSAvoidprocessing complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts passive devices from the substrate embedding process and places them as separate components on the solder-ball side of the substrate. This eliminates the complex embedding processing steps while maintaining the multi-functional capability of the package assembly.

Inventive Principle:
Principle #2Taking out (Extraction)

2Adaptability or versatility

If passive devices are embedded in the substrate, then multi-functionality is achieved, but fabrication cost increases

Engineering Contradiction:
Improvemulti-functionalityVSAvoidfabrication cost
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent extracts passive devices from the substrate embedding process and places them as separate components on the solder-ball side of the substrate. This eliminates the complex embedding processing steps while maintaining the multi-functional capability of the package assembly.

Inventive Principle:
Principle #2Taking out (Extraction)

3Area of stationary object

If passive devices are disposed on the solder-ball side of the substrate, then space is utilized, but the passive devices must be thin and occupy space for positioning solder balls

Engineering Contradiction:
Improvespace utilizationVSAvoidpassive device thickness
Core Design Contradiction:
Area of stationary objectVSLength of moving object

Solution Approach 1:

The patent positions passive devices within the boundary area of the semiconductor die in plan view, allowing them to nest in the available space without increasing the overall package footprint. This enables thicker passive devices to be used while maintaining compact dimensions.

Inventive Principle:
Principle #7Nested doll (Nesting)

4Volume of moving object

If package size is reduced for miniaturization, then portability is improved, but space for positioning components is reduced

Engineering Contradiction:
Improvepackage sizeVSAvoidcomponent placement area
Core Design Contradiction:
Volume of moving objectVSArea of stationary object

Solution Approach 1:

The patent utilizes the vertical dimension by placing passive devices on the solder-ball side of the substrate and positioning them within the semiconductor die boundary in plan view. This three-dimensional arrangement maximizes space utilization and enables package miniaturization while maintaining adequate component placement area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS10497678B2Semiconductor package assembly with passive device
Publication Date: 2019.12.03 MEDIATEK INC
  • US10497678B2 patent drawing
  • US10497678B2 patent drawing
  • US10497678B2 patent drawing

AI summary

A semiconductor package assembly includes a first substrate. A first semiconductor die is disposed on the first substrate. A passive device is located directly on the first semiconductor die. The passive device is disposed within a boundary of the first semiconductor die in a plan view.