Passive-Matrix Micro-LED Array Flip-Chip Bonding on Silicon
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Solution Overview
Problem
Conventional display technologies face challenges in effectively integrating micro-light-emitting diodes (micro-LEDs) with complementary metal-oxide-semiconductor (CMOS) integrated circuits (ICs) due to thermal mismatch and inconsistency in bonding of fine pitch solder bumps, leading to suboptimal display performance and manufacturing yields.
Innovation Solution
A passive-matrix light-emitting diodes on silicon (LEDoS) micro-display is developed, featuring a micro-LED array flip-chip bonded onto an application-specific integrated circuit (ASIC) display driver using solder bumps at peripheral areas, with each column or row of pixels sharing a common electrode for efficient addressing and grayscale representation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If micro-LEDs are integrated with CMOS ICs using flip-chip bonding, then display performance can be improved, but thermal mismatch between micro-LEDs and silicon materials causes reliability issues
Solution Approach 1:
The patent introduces a passive-matrix addressing scheme as an intermediary approach between active-matrix and direct flip-chip bonding. This scheme uses shared row and column electrodes to control multiple LEDs, reducing the number of bonding interfaces and thermal coupling points while maintaining display functionality.
Solution Approach 2:
The display is segmented into a matrix of rows and columns with shared electrodes. Instead of individually addressing each LED pixel, the system divides the control into row-select and column-data lines, reducing the complexity of bonding and thermal management requirements.
2Manufacturing precision
If conventional active-matrix display technology is used, then high resolution can be achieved, but manufacturing complexity and cost increase
Solution Approach 1:
The patent applies partial action by implementing passive-matrix addressing where only row and column electrodes are bonded,而非 full pixel-level bonding. This reduces the bonding density and complexity while achieving acceptable display resolution through the matrix addressing scheme.
3Device complexity
If passive-matrix addressing is used, then device complexity is reduced, but pixel addressing efficiency decreases compared to active-matrix
Solution Approach 1:
The patent transitions from one-dimensional pixel addressing to two-dimensional matrix addressing by introducing row and column dimensions. This allows multiple pixels to be controlled through the intersection of row-select and column-data lines, reducing the total number of bonding connections while maintaining addressing capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances display performance and manufacturing yields by reducing the number of required solder bumps, improving thermal management, and enabling efficient column and row signal application, resulting in improved brightness and power efficiency with stable operation across a wide temperature range.
Implementation Method 1
passive-matrix light-emitting diodes on silicon (LEDoS) micro-display
Implementation Method 2
micro-LED array that has been flip-chip bonded onto an ASIC display driver
Data Source
AI summary
A passive-matrix light-emitting diodes on silicon (LEDoS) micro-display is presented herein. The LEDoS micro-display comprises a passive-matrix micro-light-emitting diode (LED) array comprising passive-matrix micro-light-emitting diodes (LEDs), and a display driver configured to apply column signals to columns of LED pixels of the passive-matrix micro-LED array and scan signals to rows of the LED pixels, wherein the passive-matrix micro-LED array is flip-chip bonded to the display driver based on solder bumps located at peripheral areas of the passive-matrix micro-LED array.