Passive Optical Clock Sync for Multi-NIC Timing Distribution

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Solution Overview

Problem

In multi-interface card environments, connecting multiple interface cards to a leader clock with individual fibers or cables is costly, and PCIe interconnects cause inaccurate clock information transfer due to jittery connections.

Innovation Solution

A passive optical splitter is used to distribute clock time from a leader clock to multiple interface cards, allowing for scalable timing distribution without separate physical connections, using a passive optical splitter to calculate and share delay measurements among cards.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple separate physical links are used to connect each interface card to the leader clock, then accurate clock information transfer is achieved, but system cost and complexity increase significantly

Engineering Contradiction:
Improveclock information transfer accuracyVSAvoidnumber of physical connections
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Multiple interface cards are merged into a single optical network domain by using a passive optical splitter to combine their connections to the leader clock. This allows all interface cards to share a single physical fiber connection while maintaining individual PTP communication channels, thereby reducing the number of physical links from N (for N interface cards) to just 1, while preserving clock synchronization accuracy.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

A passive optical splitter is introduced as an intermediary device between the leader clock and multiple interface cards. This splitter acts as a mediator that distributes the optical signal from the leader clock to multiple interface cards without requiring active electronics or power, enabling accurate clock information transfer through a shared physical medium while maintaining isolation between communication channels.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If multiple separate physical links are used for each interface card, then individual delay calculation accuracy is improved, but computing resources are wasted due to redundant delay calculations

Engineering Contradiction:
Improvedelay measurement accuracyVSAvoidcomputing resource efficiency
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The delay measurement function is merged from individual interface cards to the leader clock. Instead of each interface card performing separate delay calculations with the leader clock, the leader clock performs a single delay measurement that serves all interface cards connected through the passive optical splitter. This eliminates redundant computing operations while maintaining the accuracy needed for precision time synchronization across all interface cards.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If dedicated circuitry is used for each interface card connection, then clock information transfer accuracy is maintained, but system cost increases

Engineering Contradiction:
Improveclock information transfer accuracyVSAvoidhardware components required
Core Design Contradiction:
Measurement precisionVSQuantity of substance

Solution Approach 1:

The passive optical splitter serves as a cost-effective intermediary that replaces the need for dedicated active circuitry at each interface card. By using this passive optical component, the system achieves accurate clock information transfer without requiring expensive dedicated electronics, power supplies, or active signal processing at each interface card, thereby reducing overall system cost and hardware quantity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The passive optical splitter is a simple, inexpensive component compared to dedicated active circuitry for each interface card. This passive component can be easily replaced or reconfigured if needed, providing a cost-effective solution that maintains synchronization accuracy without the high hardware investment required for dedicated circuitry at each interface card connection point.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach ensures accurate clock synchronization across multiple interface cards, preserving computing resources and reducing asynchronization risks, while minimizing the need for separate physical connections.

Implementation Method 1

a passive optical splitter coupled between a leader clock and the multiple interface cards. The optical splitter can be used to distribute clock time from the leader clock to the NICs.

Methodology Applied
Scientific EffectOptical signal splitting: Dispersion (of waves)

Data Source

PatentEP4513294B1Passive clock synchronization for timing
Publication Date: 2026.05.13 GOOGLE LLC
  • EP4513294B1 patent drawingFigure 1A
  • EP4513294B1 patent drawingFigure 1B
  • EP4513294B1 patent drawingFigure 1C

AI summary

The present disclosure provides for an architecture for a multi-interface card environment, such as a server that includes multiple network interface cards (NICs) or peripheral component interconnect express (PCIe) cards. The architecture includes a passive optical splitter coupled between a leader clock and the multiple interface cards or PCIes. The optical splitter can be used to distribute clock time from the leader clock to the interface cards. The architecture provides for distribution of timing in a scalable manner in the multi-NIC environments for cloud deployments.