Integrated Passive Structure With Edge Stress Buffer for Thermal Cracks
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Solution Overview
Problem
Integrated passive electronic devices experience cracks in the passivating layer during thermal cycles due to mismatched thermal expansion of different layers, leading to delamination and reduced reliability.
Innovation Solution
Incorporating a stress buffer layer made of a material with higher tensile strength than the passivating layer, positioned at the edges of the metal layer, to absorb and redistribute thermal stress, thereby reducing the likelihood of cracks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a passivating layer is deposited to protect the metal layer, then protection and insulation are improved, but thermal expansion mismatch causes cracks and delamination
Solution Approach 1:
A stress buffer layer made of silicon nitride is introduced between the copper metal layer and the organic passivating layer. This intermediary layer has a thermal expansion coefficient that bridges the gap between the metal and the passivating layer, absorbing thermal stress and preventing cracks in the passivating layer while maintaining its protective function.
Solution Approach 2:
The patent uses a composite structure combining inorganic materials (silicon nitride stress buffer layer) with organic materials (passivating layer). This composite approach allows each layer to contribute its specific properties: the inorganic layer provides thermal stability and stress buffering, while the organic layer provides protection and insulation, together resolving the thermal expansion mismatch problem.
2Reliability
If the passivating layer is made of organic material for protection, then insulation is improved, but crack resistance deteriorates under thermal cycling
Solution Approach 1:
The stress buffer layer is deposited beforehand to cushion and absorb the thermal stress that would otherwise be transmitted to the organic passivating layer during thermal cycling. This pre-positioned cushioning layer prevents the passivating layer from cracking under thermal stress while maintaining its insulation properties.
3Ease of manufacture
If metal layer edges are exposed without stress buffer, then manufacturing is simpler, but thermal stress concentration increases
Solution Approach 1:
The stress buffer layer is selectively applied only at the edges and corners of the metal layer where thermal stress concentration occurs, rather than covering the entire structure. This localized approach addresses the specific problem area while maintaining manufacturing efficiency and allowing the rest of the structure to remain simple.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The stress buffer layer effectively manages thermal stress, minimizing cracks in the passivating layer and enhancing the reliability and lifespan of the electronic device.
Implementation Method 1
cracks in the passivating layer during thermal cycles due to mismatched thermal expansion of different layers
Implementation Method 2
the stress buffer layer effectively manages thermal stress, minimizing cracks in the passivating layer
Data Source
AI summary
The present disclosure relates to an integrated passive electronic device including a stack, in the order, starting from a top face of a support, of an insulating layer, a metal layer, and a passivating layer made of an electrically insulating material, the passivating layer coating the top face and side flanks of the metal layer, wherein a stress buffer layer made of another electrically insulating material different from the material of the passivating layer is formed on top edges of the metal layer between the metal layer and the passivating layer, the stress buffer layer being in contact with the metal layer.