Patch Boundary Vertex Signaling for Volumetric Video Mesh Coding
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Solution Overview
Problem
Existing volumetric video coding technologies face challenges in efficiently encoding and decoding the boundaries of patch meshes, leading to increased computational complexity and resource utilization.
Innovation Solution
The proposed solution involves identifying patch boundaries and vertices, adding signaling information for these boundaries, and encoding them in a bitstream, which includes extending the syntax of mesh patch data units and using sub-bitstreams for efficient encoding and decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If patch boundaries and vertices are encoded without dedicated signaling information, then the bitstream structure remains simple, but the decoder cannot efficiently identify boundary vertices leading to increased computational complexity
Solution Approach 1:
The patent segments the mesh data by introducing dedicated signaling information for boundary vertices within patch structures. Each patch is independently identified with boundary vertex flags, allowing the decoder to efficiently segment and process only boundary vertices without analyzing the entire mesh structure, thus improving encoding efficiency while maintaining manageable bitstream complexity through structured organization
Solution Approach 2:
The patent applies preliminary action by pre-identifying and signaling boundary vertices during the encoding phase. The encoder marks boundary vertices with dedicated signaling information before transmission, so the decoder receives pre-processed data that requires minimal additional computation, effectively shifting computational work from decoding to encoding phase
2Productivity
If boundary vertex information is signaled for every vertex, then decoding efficiency improves, but the amount of data in the bitstream increases
Solution Approach 1:
The patent applies local quality by providing detailed boundary vertex signaling information only where needed - specifically at patch boundaries - rather than uniformly for all vertices. Interior vertices without special boundary characteristics use default processing, reducing the overall quantity of signaling data while maintaining high decoding efficiency at critical boundary regions
Solution Approach 2:
The patent uses partial action by signaling boundary vertex information for only the necessary subset of vertices that form patch boundaries, rather than providing information for all vertices in the mesh. This selective approach achieves sufficient decoding efficiency for boundary processing without the excessive data overhead of universal vertex signaling
3Ease of operation
If patch boundaries are clearly defined with signaling information, then computational resource utilization improves, but the encoding process becomes more complex
Solution Approach 1:
The patent segments the encoding process by introducing structured patch boundaries with dedicated signaling information. This segmentation allows the encoder to process and identify boundary vertices through systematic patch-level operations rather than complex global mesh analysis, improving computational resource utilization during decoding while organizing encoding complexity into manageable patch-level tasks
Solution Approach 2:
The patent applies universality by designing a signaling mechanism that serves multiple functions: it identifies boundary vertices, defines patch structures, and enables efficient decoder operations all through a unified signaling approach. This multi-functional signaling reduces the need for separate processing mechanisms, balancing encoding complexity with improved computational resource utilization
Data Source
AI summary
Various embodiments provide an apparatus, a method, and a computer program product. An example apparatus includes: at least one processor; and at least one memory including computer program code; wherein the at least one memory and the computer program code are configured to, with the at least one processor, cause the apparatus at least to: identify one or more patch boundaries; identify one or more vertices that form the one or more patch boundaries; add signaling information for the one or more vertices that form the one more patch boundaries; and encode at least one of the one or more patch boundaries, one or more vertices that form the one or more patch boundaries, or the signaling information in or along a bitstream.