Patch and Elided Fidelity Estimation for Quantum Processor Benchmarking

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Solution Overview

Problem

Conventional benchmarking techniques for quantum computing face exponential computational costs when estimating fidelity for large-scale quantum circuits, leading to inaccurate extrapolations and inefficiencies in characterizing quantum state errors.

Innovation Solution

The method involves partitioning quantum circuits into sub-circuits by removing multi-qubit gates along boundaries, allowing for separate classical simulation of each sub-circuit, and using techniques like patch XEB and elided XEB to estimate fidelity with controlled classical computation costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional benchmarking techniques are used to estimate fidelity for large-scale quantum circuits, then measurement precision can be achieved, but computational cost increases exponentially

Engineering Contradiction:
Improvefidelity estimation accuracyVSAvoidcomputational complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the large quantum circuit into smaller sub-circuits by partitioning the qubit array and removing multi-qubit gates that cross the boundaries. This segmentation allows classical simulation of each sub-circuit independently, reducing the exponential computational complexity while maintaining fidelity estimation accuracy through the product of sub-circuit fidelities.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If full quantum circuits are simulated classically, then accurate fidelity can be estimated, but computational time becomes prohibitively long

Engineering Contradiction:
Improvefidelity estimation accuracyVSAvoidcomputational time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

By partitioning the quantum circuit into sub-circuits that can be simulated independently, the patent reduces the time required for classical simulation from exponential to polynomial time complexity, making fidelity estimation feasible for large-scale quantum systems.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates simplified copies of the quantum circuit by removing multi-qubit gates across boundaries, resulting in sub-circuits that are easier to simulate classically. These simplified copies retain enough structural information to accurately estimate fidelity when combined through the product rule.

Inventive Principle:
Principle #26Copying

3Adaptability or versatility

If multi-qubit gates are retained in the circuit, then complete quantum operations are performed, but classical simulation becomes intractable

Engineering Contradiction:
Improvequantum operation completenessVSAvoidsimulation complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts (removes) multi-qubit gates that cross the boundaries between qubit partitions. This extraction simplifies the circuit for classical simulation while the removed gates' contribution to fidelity is accounted for through the boundary terms in the fidelity estimation formula, maintaining operational completeness.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

By segmenting the circuit into disjoint sub-circuits separated by boundaries, the patent enables classical simulation of each segment independently. The multi-qubit gates within each segment are retained, while only the boundary-crossing gates are removed, achieving a balance between completeness and simulability.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12417161B2Patch and elided fidelity estimation
Publication Date: 2025.09.16 GOOGLE LLC
  • US12417161B2 patent drawing
  • US12417161B2 patent drawing
  • US12417161B2 patent drawing

AI summary

Methods, systems and apparatus for estimating quantum processor performance. In one aspect, a method includes defining a benchmarking circuit configured to operate on an array of qubits, wherein the benchmarking circuit comprises one or more cycles of quantum gates, each cycle comprising a respective layer of randomly sampled single-qubit gates and a layer of multiple instances of a same multi-qubit gate; partitioning the defined benchmarking circuit into two or more sub-circuits, comprising: defining one or more boundaries between qubits in the array of qubits, removing instances of the multi-qubit gate that cross the defined one or more boundaries to create the two or more sub-circuits; performing a benchmarking process using the partitioned benchmarking circuit to estimate a respective circuit fidelity of each of the sub-circuits; and multiplying the estimated circuit fidelities of each of the sub-circuits to obtain an estimate of the fidelity of the quantum processor.