Patch Memory Circuit for ROM Timing Attack Protection

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Solution Overview

Problem

Existing integrated circuits lack effective methods to protect against side channel attacks, particularly timing attacks, especially when vulnerabilities are discovered after the ROM is programmed, and it is difficult to detect all potential information leakages during development.

Innovation Solution

Implement a patch memory to add a side channel protection function, such as a delay function, to ROM, which is not part of the main program and is used to modify the execution time of vulnerable code to make it constant, using a configuration stored in a separate patch memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If firmware is programmed into ROM during development, then the application is fixed and stable, but vulnerabilities to side channel attacks cannot be detected or corrected after release

Engineering Contradiction:
Improveapplication stabilityVSAvoidvulnerability correction capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The memory system is segmented into two distinct parts: ROM containing the original application code and patch memory containing protection code. This segmentation allows the ROM to maintain stability while the patch memory provides adaptability for security corrections. The vulnerable function in ROM remains unchanged, while the patch memory stores replacement instructions that can be activated to correct vulnerabilities without reprogramming the ROM.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patch memory is pre-configured with protection code and replacement instructions before the vulnerability is fully exploited. When a vulnerability is detected, the system can immediately activate the pre-prepared patch by loading the replacement instructions from patch memory, providing rapid response capability without requiring ROM reprogramming or system downtime.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the number of computations is made independent of input to prevent timing attacks, then security against timing attacks is improved, but processing speed decreases

Engineering Contradiction:
Improvetiming attack resistanceVSAvoidprocessing speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patch memory acts as an intermediary that provides timing attack protection without requiring fundamental changes to the original algorithm. Instead of making all computations independent of input (which would slow down processing), the patch selectively adds protection only to the vulnerable function, using intermediate steps like random delays and alternative computation paths that maintain constant timing characteristics while preserving overall processing efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If a patch memory is added to ROM, then post-release vulnerability correction is enabled, but device complexity increases

Engineering Contradiction:
Improvevulnerability correction capabilityVSAvoidmemory system complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patch memory is designed to serve multiple functions: storing protection code, containing replacement instructions, and providing random delay sequences. This multi-functionality reduces the need for separate dedicated components for each security feature, thereby limiting the increase in device complexity while maximizing the adaptability and vulnerability correction capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12499226B2Circuit and method for protecting an application against a side channel attack
Publication Date: 2025.12.16 NXP BV
  • US12499226B2 patent drawing
  • US12499226B2 patent drawing
  • US12499226B2 patent drawing

AI summary

A method is provided for protecting a device against a side channel attack. In the method a portion of code in a program stored in read only memory (ROM) of an integrated circuit is determined to be vulnerable to a side channel attack. A patch memory is provided, separate from the ROM, for storing one or more instructions configured to transfer execution of the portion of code to a side channel protection function stored in the ROM. Execution of the program is transferred to the side channel protection function stored in the ROM. The side channel protection function in the ROM is configured to modify execution of the portion of code to protect against a possible side channel attack. After the side channel function is applied, normal program execution resumes. In another embodiment, an integrated circuit is provided that performs the method.