Patch Mesh Operand Broadcast for Deterministic MAC Execution
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Solution Overview
Problem
Conventional integrated circuit architectures face challenges in efficiently distributing operands across processing elements while minimizing interconnect congestion and ensuring deterministic multiply-accumulate operations, particularly in irregular computation domains.
Innovation Solution
Implementing a patch mesh interconnect architecture that enables localized, directionally controlled operand broadcasting and execution scheduling, using a configurable mesh to propagate operands in a wavefront pattern with staggered arrival times and localized storage to align with MAC operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If full-array broadcasting is used to distribute operand values across the processing array, then all processing elements can access operands, but interconnect congestion increases and routing complexity increases
Solution Approach 1:
The processing array is divided into multiple patches, each with its own localized interconnect. Operand broadcasting is performed independently within each patch rather than across the entire array, reducing interconnect congestion and routing complexity while maintaining operand distribution efficiency.
Solution Approach 2:
Each patch is equipped with dedicated broadcasting resources and interconnect structures tailored to its specific needs. This localized approach allows operands to be distributed efficiently within each patch using simpler routing logic, avoiding the complexity of global routing across the entire array.
2Reliability
If centralized dispatch is used to manage operand distribution, then operand movement is coordinated, but synchronization overhead increases and latency increases
Solution Approach 1:
The centralized dispatch function is segmented into multiple distributed dispatchers, one for each patch. Each dispatcher independently manages operand distribution within its patch, eliminating the need for global synchronization and reducing latency while maintaining coordination through localized control.
Solution Approach 2:
Each patch is self-sufficient with its own dispatcher and interconnect resources, able to independently manage its own operand distribution without relying on centralized coordination. This autonomy reduces synchronization overhead and latency while ensuring reliable operand delivery within each patch.
3Productivity
If wavefront execution model is used to propagate operand data, then pipelined execution is facilitated, but operand timing flexibility is reduced and spatial reuse is constrained for irregular computation domains
Solution Approach 1:
The computation domain is segmented into multiple patches, each capable of independent wavefront execution. This allows different timing schedules and execution patterns to be applied to different patches simultaneously, providing timing flexibility for irregular computation domains while maintaining pipelined execution throughput within each patch.
Solution Approach 2:
The patch interconnect architecture dynamically configures operand propagation paths and timing within each patch based on the specific computation requirements. This dynamic adaptability allows the system to maintain high pipelined execution throughput while accommodating irregular computation domains with varying timing and spatial reuse patterns.
4Ease of operation
If global interconnects are used for operand movement, then operand distribution is simplified, but data movement overhead increases and locality is reduced
Solution Approach 1:
The global interconnect is segmented into multiple localized patch interconnects. Operands are distributed within each patch using local interconnect resources, reducing data movement overhead and energy consumption while maintaining operational simplicity through standardized patch interfaces.
Solution Approach 2:
Each patch has its own localized interconnect structure optimized for its specific spatial and computational characteristics. This localizes data movement to minimize overhead and energy consumption while maintaining simple operand distribution through patch-level autonomy and standardized interfaces.
Data Source
AI summary
A technique is disclosed for operand propagation and accumulation within a processing array of an integrated circuit using overlapping patch regions. The system includes an interconnecting processing patch defined over a rectilinear subset of processing elements, with an origin processing element broadcasting operand data to the remaining elements in a directionally constrained, time-staggered wavefront pattern. A logical processing patch is separately defined over a second rectilinear subset of processing elements. The interconnecting processing patch and the logical processing patch partially overlap to form an interconnecting patch mesh comprising a common set of processing elements. Operand data is propagated from the origin of the interconnecting patch to the common processing elements within the patch mesh, enabling operand handoff or accumulation across patch boundaries. The architecture supports fine-grained, localized data movement and patch-level execution coordination across a mesh of processing elements to optimize compute reuse, operand locality, and execution throughput.