Patrolling Valid Pages to Reduce Read Disturb Error Handling Time

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing methods for handling read disturb errors in memory units are inefficient as they do not effectively evaluate system operations and memory block usage, leading to increased processor time consumption and prolonged memory resource unavailability.

Innovation Solution

A method and system that retrieve status information from memory blocks, identify target blocks with high erase counts, and patrol only valid pages for read disturb errors, recycling them to handle errors efficiently while dynamically initializing the patrolling process based on read-write operation thresholds.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all memory blocks and pages are patrolled including invalid pages, then read disturb errors are identified, but processor time consumption increases and memory resources remain unavailable for longer periods

Engineering Contradiction:
Improveread disturb error identificationVSAvoidprocessor time consumption
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts and excludes invalid pages from the patrolling process. The memory management system evaluates status information of each memory block to identify valid pages, and only patrols these valid pages instead of all pages including invalid ones. This extraction of unnecessary patrol targets directly reduces processor time consumption while maintaining error detection capability for actually usable memory.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies different patrol strategies to different parts of memory based on their status. Valid pages receive thorough patrolling to detect read disturb errors, while invalid pages are excluded from patrolling. This localized quality approach ensures that patrol resources are concentrated where they are actually needed - in memory regions that contain valid data and can exhibit read disturb errors.

Inventive Principle:
Principle #3Local quality

2Reliability

If comprehensive patrolling of all memory blocks is performed, then error detection capability is maintained, but memory resources remain unavailable for longer periods

Engineering Contradiction:
Improveerror detection capabilityVSAvoidmemory resource availability
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts invalid pages from the patrolling scope by evaluating block status information before initiating patrol operations. Only blocks containing valid pages are selected for patrolling, which reduces the total time memory resources remain unavailable while preserving the ability to detect errors in actually usable memory regions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs partial patrolling by selectively choosing only certain memory blocks that contain valid pages for patrol operations, rather than patrolling all memory blocks. This partial action approach is sufficient to maintain error detection capability while significantly reducing the time memory resources are occupied and unavailable for normal operations.

Inventive Principle:
Principle #16Partial or excessive action

3Ease of operation

If existing patrolling methods are used without evaluating system operations and block usage, then implementation is simple, but overall effectiveness of patrolling process is reduced

Engineering Contradiction:
Improvepatrolling implementation simplicityVSAvoidpatrolling effectiveness
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The patent performs preliminary evaluation of memory block status information and system operations before initiating the patrolling process. The memory management system assesses which blocks contain valid pages and prioritize patrolling based on this pre-evaluation. This preliminary action ensures that patrol operations are directed toward blocks that actually need monitoring, improving overall patrolling effectiveness without significantly complicating the implementation.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10971241B2Performance based method and system for patrolling read disturb errors in a memory unit
Publication Date: 2021.04.06 KIOXIA CORP
  • US10971241B2 patent drawing
  • US10971241B2 patent drawing
  • US10971241B2 patent drawing

AI summary

Disclosed herein is a method and a system for handling read disturb errors in a memory unit. Status information related to each memory block in the memory unit is retrieved and plurality of target memory blocks with valid pages and having highest block erase count are identified for patrolling. Each valid page in the target memory blocks are patrolled for identifying read disturb errors. Finally, each valid page having read disturb errors are recycled, thereby effectively handling the read disturb errors in the memory unit. The method disclosed herein involves patrolling of only the valid pages in the memory block, thereby reducing the time required for handling the read disturb errors and improving the overall performance. Also, the method ensures data retention reliability within each memory blocks by patrolling the memory block in the order of highest block erase counts.