Pattern-Oriented RC Extraction for Advanced Nodes
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Solution Overview
Problem
Advanced semiconductor technology nodes require accurate RC parasitic modeling, which is complex and time-consuming, especially for large-scale designs, due to the increasing impact of RC effects on chip parameters, making traditional extraction methods impractical for fast development and maintenance.
Innovation Solution
A method using pattern-oriented functions to simplify RC profile generation by defining integrated chip components' shapes based on graphical features, reducing complexity and enabling faster development and maintenance of RC decks, incorporating pre-defined pattern-oriented functions and data objects that reference process parameters within a database.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If accurate RC parasitic modeling is used for advanced process nodes, then modeling precision is improved, but device complexity and time consumption increase
Solution Approach 1:
The patent segments the complex RC extraction problem into distinct functional blocks including pattern recognition modules, shape determination functions, and parasitic calculation units. Each block handles a specific aspect of the extraction process, transforming a monolithic complex operation into manageable modular components that can be processed independently and efficiently
Solution Approach 2:
The patent implements preliminary action by pre-defining pattern-oriented functions and shape templates that capture common geometric patterns found in integrated circuit layouts. These pre-characterized patterns are stored in a database and automatically matched during extraction, eliminating the need to perform complex geometric calculations from scratch for each pattern, thereby reducing both computational complexity and time consumption
2Measurement precision
If 3D extraction methods are used for accurate RC parasitic extraction, then measurement precision is improved, but productivity decreases
Solution Approach 1:
The patent creates simplified 2.5D representations that copy the essential geometric and electrical characteristics of complex 3D structures. By extracting and modeling only the critical parasitic elements in a simplified dimensional representation, the method maintains sufficient accuracy for advanced process nodes while dramatically reducing computational complexity and extraction time for large-scale designs
Solution Approach 2:
The system performs preliminary pattern recognition and shape classification before executing the full extraction algorithm. By pre-identifying standard patterns and assigning them pre-characterized parasitic models, the method avoids performing complete 3D extractions for every structure, thereby maintaining high accuracy for critical components while significantly improving overall productivity through selective detailed analysis
3Ease of operation
If traditional RC extraction methods are used, then ease of operation is maintained, but measurement precision deteriorates for advanced process nodes
Solution Approach 1:
The patent implements a universal extraction framework that automatically adapts to different process nodes and design complexities. The system includes a hierarchy of extraction methods ranging from simplified 2.5D approaches for routine structures to full 3D analysis for critical components, all managed through a single automated workflow. This multi-functional approach maintains ease of operation by eliminating manual method selection while ensuring measurement precision is optimized for each specific case through automatic algorithm selection based on pattern recognition and design characteristics
Data Source
AI summary
The present disclosure relates to a method of RC extraction that provides for a fast development time and easy maintenance. In some embodiments, the method provides a graphical representation of an integrated chip layout having a plurality of integrated chip components. A plurality of pattern based graphical features are then determined. Respective pattern based graphical features define a structural aspect of an integrated chip component. One of the plurality of integrated chip components is defined as a pattern oriented function having inputs of one or more of the pattern based graphical features. The pattern oriented function determines a shape of the one of the plurality of integrated chip components based upon a relation between the plurality of inputs. By determining a shape of an integrated chip component using a pattern oriented function, the complexity of RC profiles can be reduced.