Pattern-Recognition Processor Results Buffer Parallel FSMs
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Pattern recognition tasks in computing are bottlenecked by the increasing number of patterns to be searched in data streams, leading to delays and irregular flow of results, making it difficult to design systems that interface effectively with pattern-recognition hardware.
Innovation Solution
A pattern-recognition processor with a results buffer that uses parallel finite state machines to evaluate multiple search criteria simultaneously, including a recognition module and an aggregation module with an output buffer to manage and report matches efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple patterns are searched sequentially in a data stream, then each pattern can be searched thoroughly, but the processing delay increases with the number of patterns
Solution Approach 1:
The patent divides the pattern recognition task into multiple parallel finite state machines, each responsible for searching a specific pattern. This segmentation allows simultaneous processing of multiple patterns without sequential delays, resolving the contradiction between thorough pattern searching and processing speed.
Solution Approach 2:
The patent implements continuous parallel processing where multiple finite state machines operate simultaneously on the data stream, eliminating idle time between pattern searches. This maintains continuous useful action across all pattern recognition tasks, preventing delay accumulation.
2Adaptability or versatility
If the system searches for many patterns, then pattern recognition capability increases, but the delay before the system is ready to search the next portion of the data stream increases
Solution Approach 1:
The system segments pattern recognition into independent finite state machines that process patterns in parallel. This allows the system to maintain high pattern recognition capability while processing data at high speed, as each state machine independently handles its assigned pattern without waiting for others.
Solution Approach 2:
The patent merges multiple pattern search operations into a single parallel processing framework where finite state machines operate simultaneously on the same data stream. This combining of operations achieves both high pattern recognition capability and high processing speed through concurrent execution.
3Speed
If matches are reported immediately as they occur, then real-time detection is achieved, but the irregular flow of results data makes system interfacing difficult
Solution Approach 1:
The patent introduces an intermediary buffer between the parallel finite state machines and the external system. This buffer absorbs the irregular flow of match results and provides a regularized output stream, simplifying system interfacing while maintaining fast match reporting through the parallel architecture.
Data Source
AI summary
Disclosed are methods and devices, among which is a device that includes a pattern-recognition processor. The pattern-recognition processor may include or be coupled to a results buffer, which may have a plurality of records, a write-control module configured to write data relevant to search results in the plurality of records, and a read control module configured to read data from the plurality of records.