Pattern Selection for Semiconductor Lithography Model Training

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current methods for selecting patterns in lithography lack efficiency in achieving adequate pattern coverage for training computational models, often requiring additional patterning and machine learning processes, which are resource-intensive and time-consuming.

Innovation Solution

A method for selecting informative patterns based on maximizing system entropy by representing patterns in a Hilbert Space domain using basis functions like Hermite Gaussian, Zernike, or Bessel functions, which allows for direct selection from the target layout without requiring additional patterning or machine learning models, thereby reducing computational resources and time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If additional patterning and machine learning processes are used for pattern selection, then pattern coverage and model training quality improve, but computational resources and time consumption increase

Engineering Contradiction:
Improvepattern coverageVSAvoidcomputational resources
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent extracts only the most informative patterns from the target layout using information metric calculations, eliminating the need for additional patterning processes. By representing patterns in a reduced-dimensional feature space and selecting based on mutual information, the method obtains adequate pattern coverage without requiring extra computational resources for additional patterning steps.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces traditional mechanical/additional patterning processes with computational information theory-based selection. Instead of physically creating additional patterns through lithography, the method uses entropy calculations and information metrics to identify representative patterns directly from the target layout, substituting physical processes with mathematical analysis.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Manufacturing precision

If additional patterning and machine learning processes are used for pattern selection, then model training quality improves, but time consumption increases

Engineering Contradiction:
Improvemodel training qualityVSAvoidtime consumption
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent performs preliminary pattern selection by calculating information metrics and representing patterns in feature space before actual model training begins. By pre-identifying the most informative patterns using entropy-based calculations, the method prepares optimized training data in advance, eliminating time-consuming trial-and-error training processes and reducing overall computation time.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If a small subset of patterns is selected for training, then computational efficiency improves, but pattern coverage may be insufficient

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidpattern coverage
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent transforms patterns from high-dimensional pixel space to a reduced-dimensional feature space using information theoretic representations. By changing the parameter space and calculating mutual information metrics in this transformed domain, the method can identify a small subset of patterns that maximally represent the full pattern diversity, achieving both computational efficiency and adequate coverage simultaneously.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240184213A1Method of pattern selection for a semiconductor manufacturing related process
Publication Date: 2024.06.06 ASML NETHERLANDS BV
  • US20240184213A1 patent drawing
  • US20240184213A1 patent drawing
  • US20240184213A1 patent drawing

AI summary

A method and apparatus for selecting patterns for training or calibrating models related to semiconductor manufacturing. The method includes obtaining a first set of patterns; representing each pattern of the first set of patterns in a representation domain, the representation domain corresponding to electromagnetic functions; and selecting a second set of patterns from the first set of patterns based on the representation domain.