Pattern Synthesis Apparatus for Variable Frequency Semiconductor Testing

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Solution Overview

Problem

Current semiconductor test systems are limited in accurately detecting failure patterns in semiconductor devices, especially those with variable operating frequencies, as they rely on fixed test conditions and may not accurately simulate the operational environment of user devices.

Innovation Solution

A semiconductor test system that includes a pattern synthesis apparatus to measure timing signal intervals with variable frequencies, extract logic values from interface signals, and generate test pattern data, which is then used to reconstruct timing and driving signals to test the device's operating state.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If fixed frequency test equipment is used, then test conditions are stable and controllable, but the system cannot accurately test devices with variable operating frequencies

Engineering Contradiction:
Improvetest accuracyVSAvoidfrequency adaptability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The test system dynamically adjusts the test frequency to match the actual operating frequency of the semiconductor device. The frequency adjustment unit receives frequency information from the device under test and dynamically modifies the test signal frequency, enabling accurate testing across variable operating conditions rather than being constrained to fixed frequencies.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the frequency parameter of the test signal based on the actual operating frequency of the device. By receiving frequency information from the device and adjusting the test signal accordingly, the system adapts its operating parameters to match real-world conditions, improving test accuracy for variable frequency devices.

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If ATE with fixed test patterns is used, then logical failures can be detected, but failure patterns in actual operation environment cannot be reliably detected

Engineering Contradiction:
Improvefailure detection accuracyVSAvoidenvironmental simulation capability
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The test system dynamically generates test patterns based on actual operating conditions rather than using fixed predetermined patterns. By continuously adapting the test signals to match the device's actual operating frequency and conditions, the system can detect failures that occur specifically in operational environments.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system copies actual operating conditions by receiving frequency information from the device under test and reproducing those same conditions during testing. This creates an accurate replica of the operational environment, allowing detection of failures that would only occur under real operating conditions.

Inventive Principle:
Principle #26Copying

3Ease of operation

If mounting-type test equipment with socket is used, then testing is easier to perform, but distortion in actual operation environment occurs

Engineering Contradiction:
Improvetest accessibilityVSAvoidoperation environment accuracy
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The system applies partial mounting-type testing by using simplified connection methods that provide sufficient accessibility for testing without requiring full socket mounting. This partial approach maintains ease of operation while avoiding the distortion and environmental inaccuracies introduced by complete socket-based mounting.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9229057B2Pattern synthesis apparatus and semiconductor test system having the same
Publication Date: 2016.01.05 SAMSUNG ELECTRONICS CO LTD
  • US9229057B2 patent drawing
  • US9229057B2 patent drawing
  • US9229057B2 patent drawing

AI summary

A semiconductor test system includes a user device configured to operate a reference device in accordance with an interface signal based on a timing signal having a variable operating frequency, a pattern synthesis apparatus configured to measure an interval between adjacent edges of the timing signal transmitted from the user device, and extract a logic value of the interface signal in accordance with the timing signal so as to generate test pattern data, and a test device configured to receive the test pattern data, reconstruct the timing signal based on the measured interval, generate a test driving signal such that the logic value is extracted from a device under test (DUT) based on the reconstructed timing signal, and apply the test driving signal to the DUT so as to determine an operating state of the DUT.