Patterned Bond Pad Segmentation for CMP Dishing Reduction

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Solution Overview

Problem

Conventional large bond pads in 3D integrated circuits suffer from dishing effects during chemical mechanical polish processes, leading to unreliable bonding and reduced current conductivity due to uneven surface polishing.

Innovation Solution

The introduction of patterned bond pads with openings and through-silicon vias, where the bond pads have reduced local pattern density to minimize dishing effects, and are connected by metal lines and vias for improved contact and conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If large bond pads are used to ensure sufficient bonding area and current conductivity, then bonding reliability and current flow are improved, but dishing effect occurs during CMP processes causing uneven polishing and reduced bonding quality

Engineering Contradiction:
Improvebonding reliabilityVSAvoidsurface uniformity
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The bond pad is divided into multiple segments separated by grooves, transforming a single large continuous pad into multiple smaller discrete bonding regions. This segmentation allows each region to be polished more uniformly while maintaining the overall large bonding area, thereby resolving the dishing effect problem while preserving bonding reliability and current conductivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The grooves are strategically positioned to create local variations in the bond pad structure, with deeper regions at the centers of bonding areas and elevated regions at the peripheries. This local quality differentiation ensures uniform polishing across the entire bond pad area while maintaining sufficient bonding area and electrical conductivity in critical regions.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If large bond pads are used to increase bonding area, then current conductivity is improved, but dishing effect reduces the effective bond area and current flow

Engineering Contradiction:
Improvebonding areaVSAvoidpolishing uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

By segmenting the large bond pad into multiple smaller regions separated by grooves, the patent maintains the total bonding area while ensuring each segment polishes uniformly. The grooves prevent the dishing effect that would otherwise occur in large continuous areas, thereby preserving both bonding area quantity and polishing uniformity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The groove structure creates local quality variations that promote uniform material removal during CMP. The elevated peripheral regions and depressed central regions ensure that polishing pressure is distributed evenly across the entire bond pad, maintaining both total bonding area and uniformity throughout the polishing process.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances bonding reliability and current conductivity by reducing dishing effects and ensuring a larger contact area, while maintaining manufacturing efficiency without additional process steps or costs.

Implementation Method 1

In the formation of bond pads 4 and 8, chemical mechanical polish (CMP) processes typically involved

Methodology Applied
Scientific EffectChemical mechanical polishing:

Implementation Method 2

In the commonly used direct copper bonding, each of the two wafers has copper pads exposed on the surfaces of the wafers, and the two wafers are bonded by applying a high pressure, so that the copper pads are bonded together

Methodology Applied
Scientific EffectDirect copper bonding:

Data Source

PatentUS8053900B2Through-substrate vias (TSVs) electrically connected to a bond pad design with reduced dishing effect
Publication Date: 2011.11.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8053900B2 patent drawing
  • US8053900B2 patent drawing
  • US8053900B2 patent drawing

AI summary

An integrated circuit structure includes a semiconductor chip, which further includes a first surface; and a patterned bond pad exposed through the first surface. The patterned bond pad includes a plurality of portions electrically connected to each other, and at least one opening therein. The integrated circuit further includes a dielectric material filled into at least a portion of the at least one opening.