Patterned Ground Structure for Semiconductor Package Eddy Current Control

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Solution Overview

Problem

Conventional semiconductor package designs suffer from parasitic eddy currents induced by inductive elements, which degrade performance and heat dissipation capabilities due to the close proximity of the inductive elements to the metal package ground.

Innovation Solution

A patterned ground design with conductive lines or gaps oriented perpendicular to the magnetic field generated by inductive elements, increasing the distance between the inductive elements and the ground plane, thereby reducing eddy currents and enhancing heat dissipation through additional thermal pathways.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-generated harmful factors

If a hollow space is added under the inductive element to increase separation from the metal package ground, then eddy currents are reduced, but heat dissipation capability deteriorates

Engineering Contradiction:
Improveeddy currentsVSAvoidheat dissipation capability
Core Design Contradiction:
Object-generated harmful factorsVSTemperature

Solution Approach 1:

The ground plane is segmented into multiple conductive lines arranged in a specific pattern rather than using a solid ground plane. This segmentation breaks up the continuous conductive path that would support eddy currents while maintaining sufficient thermal conduction pathways for heat dissipation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The ground structure is designed with different local properties: the conductive lines are oriented and spaced to minimize eddy current paths in the region affected by the magnetic field, while maintaining thermal connectivity to ground for heat dissipation. The pattern creates zones with different electrical and thermal characteristics.

Inventive Principle:
Principle #3Local quality

2Object-generated harmful factors

If the distance between the inductive element and metal package ground is increased, then eddy currents are reduced, but device complexity increases

Engineering Contradiction:
Improveeddy currentsVSAvoidpackage structure complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

Instead of increasing vertical distance (one dimension), the solution uses a two-dimensional patterned ground plane with conductive lines arranged in specific orientations and spacing. This approach reduces eddy currents through lateral geometry rather than vertical separation, avoiding increased device height and complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The patterned ground structure effectively inhibits eddy currents and improves heat dissipation in semiconductor packages by optimizing the distance and orientation of conductive elements, leading to enhanced performance and thermal management.

Implementation Method 1

The inductive element generates a magnetic field that induces or causes eddy currents in the metal package ground

Methodology Applied
Scientific EffectElectromagnetic induction: Electromagnetic Induction

Implementation Method 2

The patterned ground eliminates or substantially reduces the eddy current associated with the inductors or transformers

Methodology Applied
Scientific EffectEddy currents: Eddy Currents

Implementation Method 3

provides better heat dissipation of heat generated by various components in a semiconductor package

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS10109584B2Patterned grounds and methods of forming the same
Publication Date: 2018.10.23 QUALCOMM INC
  • US10109584B2 patent drawing
  • US10109584B2 patent drawing
  • US10109584B2 patent drawing

AI summary

A semiconductor package according to some examples of the disclosure may include a first body layer, a transformer that may comprise one or more inductors, coupled inductors, or inductive elements positioned above the first body layer. A first ground plane is on a top of the first body layer between the first body layer and the inductive element. The first ground plane may have conductive lines generally perpendicular to a magnetic field generated by the inductive element, and a second ground plane on a bottom of the first body layer opposite the first ground plane. The first and second ground planes may also provide heat dissipation elements for the semiconductor as well as reduce or eliminate eddy current and parasitic effects produced by the inductive element.