Patterned Lead Frame Raised Portion Design
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Solution Overview
Problem
Conventional power semiconductor devices face limitations in current capacity due to resistance from bonding materials and wires, and susceptibility to mechanical stress and thermal fatigue from solder joints.
Innovation Solution
A power device design featuring a patterned lead with a raised portion over the semiconductor chip, which increases electrical isolation, resilience to mechanical stress, and heat dissipation, eliminating the need for special bonding techniques and reducing solder joint stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bonding is used to interconnect leads to power chip, then electrical connection is established, but resistance increases and current capacity decreases
Solution Approach 1:
The patent extracts and eliminates the wire bonding element from the electrical connection path. Instead of using separate wires to bond leads to the power chip, the lead frame itself is designed with patterned leads that directly contact and bond to the power chip pads, removing the intermediate wire bonding step and its associated resistance.
Solution Approach 2:
The patent merges the lead frame structure with the bonding function. The patterned leads are integrated into the lead frame and directly bond to the power chip, combining the support function of the lead frame with the electrical connection function, thereby eliminating separate wire bonds and reducing overall resistance.
2Reliability
If solder joints are used to connect clips to power transistor, then electrical connection is established, but mechanical stress and thermal fatigue susceptibility increase
Solution Approach 1:
The patent extracts and eliminates the solder joint element from the connection between the lead frame and power chip. Instead of using solder to bond the patterned leads to the power chip pads, a direct metallurgical bond is formed through bonding material, removing the solder joint that is susceptible to mechanical stress and thermal fatigue.
Solution Approach 2:
The patent uses bonding material that creates a direct metallurgical bond between the patterned leads and power chip pads, replacing the traditional solder joint composite. This bonding material is designed to provide both electrical connection and resistance to mechanical stress and thermal fatigue, creating a more robust composite structure.
3Reliability
If bonding material and wires are used in power device, then electrical connection is achieved, but current capacity is limited
Solution Approach 1:
The patent extracts and eliminates the wire element from the electrical connection path. By using patterned leads that directly bond to the power chip without intermediate wires, the connection path is shortened and resistance is reduced, thereby increasing current capacity while maintaining reliable electrical connection.
4Ease of manufacture
If conventional lead frame design is used, then manufacturing is simple, but electrical isolation between lead and semiconductor chip is insufficient
Solution Approach 1:
The patent applies local quality by creating a patterned lead frame where specific regions have different properties. The leads are patterned with specific geometries and bonding configurations that provide enhanced electrical isolation in critical areas while maintaining manufacturing simplicity through standard lead frame fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design enhances current capacity, reduces resistance, and improves durability against thermal fatigue, allowing for higher performance and reliability in power semiconductor devices.
Implementation Method 1
Positioning at least part of the raised portion over the semiconductor chip at least advantageously increases the electrical isolation between the lead and the semiconductor chip
Implementation Method 2
At least a part of the bonded portion is bonded to the bonding pad via bonding material
Implementation Method 3
Positioning at least part of the raised portion over the bonding pad at least advantageously increases resilience of the bonding material to mechanical stress and heating fatigue
Implementation Method 4
Positioning at least part of the raised portion over the bonding pad at least advantageously increases resilience of the bonding material to mechanical stress and heating fatigue
Data Source
AI summary
A power device includes a semiconductor chip provided over a substrate, and a patterned lead. The patterned lead includes a raised portion located between a main portion and an end portion. At least part of the raised portion is positioned over the semiconductor chip at a larger height than both the main portion and the end portion. A bonding pad may also be included. The end portion may include a raised portion, bonded portion, and connecting portion. At least part of the bonded portion is bonded to the bonding pad and at least part of the raised portion is positioned over the bonding pad at a larger height than the bonded portion and connecting portion. The end portion may also include a plurality of similarly raised portions.


