Patterned LED Epitaxy With Low Protrusions for Small Chips
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Solution Overview
Problem
The challenge in growing III-V materials on heterogeneous substrates lies in lattice mismatch, which leads to defects and cracks, and patterned substrates with large protrusions result in thick buffer layers unsuitable for small-sized chips, affecting brightness and epitaxial quality.
Innovation Solution
A light-emitting element with a substrate featuring protrusions of height ≤1 μm and a stack structure comprising a buffer layer, undoped semiconductor layer, doped semiconductor layers, and a light-emitting layer, where the total thickness is <4 μm, optimizing epitaxial growth and reducing lattice constant differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the size of the protruding portion of the patterned substrate is increased to promote brightness, then the buffer layer thickness increases, but this is unfavorable for small sized chips
Solution Approach 1:
The patent changes the geometric parameters of the protruding portions, specifically controlling the height to be 0.5-1.0 μm and the top surface area to be 0.2-0.8 μm². These parameter optimizations allow the buffer layer thickness to be maintained at 0.5-2.0 μm, achieving a balance between brightness enhancement and small chip size requirements.
2Reliability
If buffer layers are formed to solve lattice mismatch between substrate and III-V materials, then defects and cracks are reduced, but the overall structure becomes more complex
Solution Approach 1:
The patent applies local quality by creating patterned protruding portions rather than a uniform buffer layer. The protruding portions are strategically positioned and sized (height: 0.5-1.0 μm, top area: 0.2-0.8 μm²) to provide localized stress adjustment and lattice matching, reducing defects only where needed while maintaining overall structural simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances epitaxial quality, reduces defects, and improves light extraction efficiency while maintaining a thin structure suitable for small-sized chips, thereby increasing brightness and uniformity.
Implementation Method 1
Due to the lattice mismatch on the heterogeneous interface between the substrate and the III-V materials, it is difficult to grow III-V materials on the heterogeneous substrate without defects or cracks
Implementation Method 2
a stack structure formed on the substrate, wherein the stack structure includes a first doped semiconductor layer, a light-emitting layer, and a second doped semiconductor layer
Data Source
AI summary
A light-emitting element includes a substrate includes an upper surface; a plurality of protrusions formed on the upper surface, wherein the plurality of protrusions includes a height less than or equal to 1 μm; and a stack structure formed on the substrate, wherein the stack structure includes a first doped semiconductor layer, a light-emitting layer, and a second doped semiconductor layer, wherein the stack structure includes a total thickness less than 4 μm.