Patterned Silicon Substrates for Low-Loss III-Nitride RF Devices
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Solution Overview
Problem
The parasitic channel at the epitaxial nitride-silicon interface in III-nitride devices on silicon substrates reduces the effective resistivity, leading to substrate loss and impacting the performance of RF devices, necessitating improved silicon substrates to mitigate this issue.
Innovation Solution
A silicon substrate with a periodic array of recesses filled with a discontinuous insulating layer is used, allowing a portion of the substrate surface to remain uncovered, upon which a first epitaxial III-nitride layer is formed, followed by a second III-nitride layer with a larger bandgap, creating a heterojunction that reduces parasitic channel effects and enhances device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a continuous insulating layer is formed to cover the entire substrate surface, then parasitic channel effects are reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The substrate surface is segmented into periodic recesses and flat regions. The insulating layer is formed discontinuously only within the recesses rather than covering the entire surface, which reduces parasitic channel effects at the nitride-silicon interface while maintaining manufacturing feasibility through a structured pattern
Solution Approach 2:
The insulating layer is applied locally within the recesses rather than uniformly across the entire substrate. This localized approach addresses parasitic channel effects specifically at the interfaces where they occur most severely, while leaving the flat regions uncovered to maintain electrical contact and reduce overall device complexity
2Loss of energy
If the effective resistivity of the substrate is increased to reduce substrate loss, then RF device performance is improved, but the parasitic channel at the interface persists
Solution Approach 1:
An insulating layer is introduced as an intermediary material within the recesses to block the parasitic channel formation at the nitride-silicon interface. This mediator prevents direct contact between the III-nitride layer and silicon substrate in critical regions, thereby eliminating the parasitic channel while maintaining low substrate loss through the periodic structure design
3Reliability
If a patterned substrate with recesses and insulating layer is used, then parasitic channel effects are reduced and effective resistivity increases, but manufacturing process complexity increases
Solution Approach 1:
The substrate is segmented into periodic recesses that can be fabricated using standard photolithography and etching processes. This segmentation creates a patterned structure that reduces parasitic channels while maintaining compatibility with existing manufacturing workflows, balancing reliability improvement with manufacturing feasibility
Solution Approach 2:
The physical parameters of the substrate are changed by creating periodic recesses with specific dimensions and filling them with insulating material. This parameter change transforms the flat substrate into a structured pattern that reduces parasitic effects while using conventional fabrication parameters and processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the effective resistivity of the substrate, reduces substrate loss, and improves the quality of the epitaxial III-nitride layer by minimizing dislocation density and stress, leading to enhanced device performance and reduced gate leakage current.
Implementation Method 1
A discontinuous insulating layer is formed within each recess of the periodic array of recesses... increases the effective resistivity of the substrate
Implementation Method 2
A first epitaxial III-nitride semiconductor layer is formed over the silicon substrate with the periodic array of recesses and discontinuous insulating layer formed thereon
Implementation Method 3
A first epitaxial III-nitride semiconductor layer is formed over the silicon substrate
Implementation Method 4
A second III-nitride semiconductor layer is disposed over the first nitride semiconductor layer and has a bandgap greater than a bandgap of the first nitride semiconductor layer... reduces parasitic channel effects
Data Source
AI summary
A III-nitride-based semiconductor device is provided. The III-nitride semiconductor device includes a silicon substrate having a surface with a periodic array of recesses formed therein. A discontinuous insulating layer is formed within each recess of the periodic array of recesses such that a portion of the silicon substrate surface between adjacent recesses is free from coverage of the discontinuous insulating layer. A first epitaxial III-nitride semiconductor layer is formed over the silicon substrate with the periodic array of recesses and discontinuous insulating layer formed thereon. A second III-nitride semiconductor layer is disposed over the first III-nitride semiconductor layer and has a bandgap greater than a bandgap of the first III-nitride semiconductor layer. At least one source and at least one drain are disposed over the second III-nitride semiconductor layer. A gate is also disposed over the second III-nitride semiconductor layer between the source and the drain.