Patterned Wafer Surface Metrology with Low-Tilt BSE Imaging
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Solution Overview
Problem
The challenge in process control of patterned wafers is the complex mapping of three-dimensional surface topography with increasing precision requirements, which existing techniques like optical, scanning electron microscopy, and atomic force microscopy struggle to achieve without compromising throughput.
Innovation Solution
A non-destructive method using scanning electron microscopy (SEM) to measure backscattered electrons (BSE) from patterned wafers, employing a small electronic tilt angle to minimize diffraction effects, and computing vertical feature extent based on BSE image contrast and landing energy, with normalization using an unpatterned wafer reference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If state-of-the-art techniques for three-dimensional surface metrology are used, then measurement precision is improved, but productivity deteriorates due to compromised throughput
Solution Approach 1:
The patent extracts and utilizes backscattered electrons (BSE) specifically for height measurement, separating this function from secondary electron imaging. By detecting BSE yield variations that correlate with surface height, the method achieves precise three-dimensional metrology through a dedicated measurement approach rather than relying on complex multi-technique systems, thereby maintaining throughput while improving precision
Solution Approach 2:
The patent changes the detection parameter from secondary electron signal to backscattered electron yield. By measuring BSE yield variations across the surface and correlating them with height information, the method transforms a qualitative imaging approach into a quantitative height measurement technique, achieving precision without sacrificing productivity
2Measurement precision
If electronic tilt angle is increased to improve height measurement accuracy, then measurement precision is improved, but reliability deteriorates due to non-linear diffraction effects
Solution Approach 1:
The patent optimizes the electronic tilt angle parameter to a small value (close to perpendicular incidence) rather than using large tilt angles. This parameter change minimizes non-linear diffraction effects that compromise measurement reliability, while still enabling accurate height measurement through BSE yield variations. The method achieves reliable and consistent measurements by operating in a regime where diffraction effects are suppressed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables precise and efficient determination of vertical feature extent on patterned wafers with a single image acquisition, reducing errors and maintaining throughput, unlike methods relying on secondary electron imaging.
Implementation Method 1
sense backscattered electrons returned from the tested wafer to obtain a backscattered electron (BSE) image of the featured region
Implementation Method 2
the scanned e-beam is projected on the tested wafer so as to impinge thereon at an electronic tilt angle of up to 2° in order to minimize non-linear diffraction effects
Data Source
AI summary
Disclosed herein is a non-destructive method for determining a vertical extent of a feature of a patterned wafer, the method including using a scanning electron microscope (SEM) to scan an e-beam over a featured region on a tested wafer and sense backscattered electrons returned from the tested wafer to obtain a backscattered electron (BSE) image of the featured region, wherein the scanned e-beam is projected on the tested wafer so as to impinge thereon at an electronic tilt angle of up to 2° in order to minimize non-linear diffraction effects.


