PBCH CRC Bit Mapping with Cyclic Shift for Faster Frame Decoding

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Solution Overview

Problem

In LTE systems, the current method of carrying the two least significant bits of the system frame number through different scrambling sequences for PBCH increases decoding delays in terminals due to the need for multiple attempts to determine the correct scrambling sequence.

Innovation Solution

A method involving concatenating CRC bits with information bits, performing cyclic shifts to encode system frame number information, and ensuring that CRC checks can only succeed when the correct cyclic shift is determined, thereby reducing the number of decoding attempts by ensuring bits at CRC locations cannot check information bits post-shift.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of information

If different scrambling sequences are used to carry the two least significant bits of the system frame number, then information transmission can be achieved, but the terminal needs to make multiple decoding attempts which increases delay

Engineering Contradiction:
Improvesystem frame number informationVSAvoiddecoding delay
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The patent changes the parameter used to carry the two least significant bits from scrambling sequence selection to cyclic shift quantity. By mapping these bits to different cyclic shift values (0, 10, 20, or 30) applied to the PBCH sequence, the terminal can determine the correct value through a single decoding attempt rather than multiple attempts with different scrambling sequences, thereby reducing decoding delay while preserving information transmission.

Inventive Principle:
Principle #35Parameter changes

2Loss of time

If cyclic shift is used to carry system frame number information, then decoding attempts can be reduced, but CRC check may fail if bits are incorrectly positioned

Engineering Contradiction:
Improvedecoding delayVSAvoidCRC check success rate
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent applies preliminary action by performing bit reversal on the two least significant bits of the system frame number before mapping them to cyclic shift quantities. This preprocessing step ensures that when the terminal performs cyclic shift and CRC verification, the bit positioning is correct, preventing CRC check failures that would occur with direct mapping. The bit reversal operation prepares the data in advance to avoid subsequent verification failures.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10985873B2CRC bits for information transmission method and device
Publication Date: 2021.04.20 HUAWEI TECH CO LTD
  • US10985873B2 patent drawing
  • US10985873B2 patent drawing
  • US10985873B2 patent drawing

AI summary

Example information transmission methods and devices are disclosed. One example method is applied to a network device and includes determining CRC bits of to-be-sent information bits, concatenating the CRC bits and the to-be-sent information bits to obtain a first information sequence, and interleaving bits in the first information sequence in an interleaving manner or scrambling the bits in the first information sequence in a scrambling manner, to obtain a second information sequence, to ensure that bits at locations of the CRC bits after a cyclic shift cannot check bits at locations of the to-be-sent information bits after the cyclic shift. A cyclic shift is performed on the second information sequence to obtain a third information sequence, where a quantity of cyclically shifted bits is used to carry information about some bits of a system frame number, and the third information sequence is sent.