Multilayer PCB Alignment via Post-Lamination Hole Formation
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Solution Overview
Problem
Conventional multilayer printed circuit board manufacturing methods face issues with misalignment, scratching, and damage due to dust and machining tolerance, leading to poor electrical contact and high frequency noise, and inadequate bonding strength from single-point bonding.
Innovation Solution
A method involving preparing circuit layers and bonding layers, optically aligning and pre-joining them with thermal compression bonding, forming alignment holes through the substrate, and laminating over alignment pins to ensure accurate alignment and strong bonding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If alignment holes are formed by drilling or punching before the layup process, then alignment holes can be created in circuit layers and bonding layers, but dust and cuttings are generated that attach to surfaces and deposit during layup, causing scratching and damage to circuits
Solution Approach 1:
The patent applies preliminary action by forming alignment holes after the layup process rather than before. The circuit layers are first stacked with bonding layers to form a complete substrate, and then alignment holes are formed through the entire stacked structure. This sequence prevents dust and cuttings from contaminating the circuit surfaces during the hole formation process, as the circuits are already protected within the stacked structure.
Solution Approach 2:
The patent inverts the conventional sequence of operations. Instead of forming alignment holes first and then stacking layers, the patent stacks the layers first and then forms the alignment holes through the complete stack. This reversal of the process sequence eliminates the harmful effect of dust and cuttings on circuit surfaces.
2Ease of operation
If each circuit layer is individually laid on alignment pins during the layup process, then layer positioning can be achieved, but alignment holes are enlarged by alignment pins and alignment accuracy is reduced
Solution Approach 1:
The patent merges all circuit layers into a single stacked substrate before forming alignment holes. By combining all layers first, the alignment pins only need to interface with the outer surfaces of the complete stack, rather than individually positioning each layer. This merging approach maintains alignment accuracy while simplifying the positioning operation.
3Ease of manufacture
If layers are bonded at a single positioning point by thermal compression bonding, then pre-joining can be achieved, but bonding strength is poor and layers may detach easily during transport
Solution Approach 1:
The patent segments the bonding process into two distinct stages: first, thermal compression bonding at multiple positioning points to create strong initial bonds; second, lamination to provide final comprehensive bonding. This segmentation allows the pre-joining stage to use multiple bonding locations, significantly improving bonding strength while maintaining manufacturing feasibility.
Solution Approach 2:
The patent applies partial bonding initially at multiple positioning points rather than attempting to bond the entire surface at once. This partial action approach creates sufficient bonding strength for handling and transport, with the understanding that complete bonding will be achieved in the subsequent lamination stage.
4Productivity
If alignment holes are formed through drilling or punching of each layer respectively, then alignment holes can be created in all layers, but machining tolerance causes each layer to have slightly misaligned holes, reducing overall alignment accuracy
Solution Approach 1:
The patent merges the hole formation operation to be performed once on the complete stacked substrate rather than separately on each individual layer. This single operation through the entire stack ensures that all alignment holes are perfectly aligned across all layers, eliminating the cumulative misalignment that would result from multiple separate drilling or punching operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances alignment accuracy, prevents damage from dust and cuttings, and improves bonding strength, resulting in improved electrical contact and reduced noise.
Implementation Method 1
bonding the circuit layers at the positioning portions of the substrate by thermal compression bonding to pre-join the circuit layers
Implementation Method 2
the pre joined layers have poor bonding strength and may be detached easily during transport, and the alignment accuracy is reduced due to uneven compression force during the lamination process
Data Source
AI summary
A manufacturing method of multilayer printed circuit boards has steps as follows: aligning circuit layers with a stacking location to form a substrate having multiple positioning portions; pre joining the substrate at the positioning portions; forming an alignment hole in each positioning portion; and placing the pre joined substrate over alignment pins of a press device for lamination. After the circuit layers are aligned, the substrate is pre joined at the positioning portions, and then the alignment holes are formed in the positioning portions for pins alignment at the press device. The alignment accuracy is enhanced. Dusts will not deposit onto surfaces of the circuit layers to damage circuits thereof.