Semiconductor Module PCB Auxiliary Patterns for Crosstalk Reduction
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Solution Overview
Problem
As the number of conductive terminals or pins on a semiconductor module increases to support high-speed and high-capacity memory devices, crosstalk between them occurs, leading to system errors such as logic fails due to time delays.
Innovation Solution
The implementation of conductive auxiliary patterns on a printed circuit board (PCB) that overlap with and are coupled to the conductive terminals, forming mutual capacitors to reduce crosstalk by increasing effective mutual capacitance between adjacent terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the number of conductive terminals is increased to support high-speed and high-capacity memory devices, then the data transmission capacity and speed are improved, but crosstalk between terminals occurs leading to system errors
Solution Approach 1:
The patent introduces auxiliary conductive patterns as intermediary elements between adjacent conductive terminals. These auxiliary patterns act as mediators that manipulate the electromagnetic field distribution, specifically increasing mutual capacitance between terminals to reduce crosstalk. The auxiliary patterns are positioned below the terminals and connected through vias, creating a controlled capacitive coupling effect that mitigates the harmful crosstalk while allowing high-density terminal arrangements.
Solution Approach 2:
The patent changes the electrical parameters of the terminal structure by adding auxiliary conductive patterns that modify the mutual capacitance between adjacent terminals. By adjusting the capacitance parameter through the auxiliary patterns' geometry, position, and connectivity, the system achieves reduced crosstalk. This parameter modification allows maintaining high terminal density while improving signal integrity through controlled electrical field interactions.
2Quantity of substance
If the number of conductive terminals in a given area is increased, then the terminal density is improved, but crosstalk between terminals increases causing logic fails
Solution Approach 1:
The auxiliary conductive patterns serve as intermediary structures that are positioned between and below adjacent terminals. These intermediaries create a controlled capacitive coupling environment that reduces the harmful direct coupling (crosstalk) between terminals. By introducing these auxiliary elements, the system can pack terminals more densely while the intermediaries manage the electromagnetic interactions to prevent logic fails.
Solution Approach 2:
The patent extends the terminal structure into the vertical dimension by placing auxiliary conductive patterns below the main terminal plane and connecting them through vias. This dimensional extension creates additional degrees of freedom for managing electromagnetic fields. The auxiliary patterns in the lower layer interact with terminals in the upper layer, providing crosstalk reduction without occupying horizontal space that would reduce terminal density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces far-end crosstalk (FEXT) amplitude, ensuring desirable signal transmission characteristics and minimizing system errors by optimizing the mutual capacitance between conductive terminals.
Implementation Method 1
The first and second conductive auxiliary patterns are provided below the first and second conductive terminals to overlap with the first and second conductive terminals, respectively... forming mutual capacitors to reduce crosstalk by increasing effective mutual capacitance between adjacent terminals
Data Source
AI summary
A device may include a substrate having a first surface and a second surface, a first conductive terminal disposed over the first surface, a second conductive terminal spaced apart from the first conductive terminal in a first direction and disposed over the first surface, a first conductive auxiliary pattern disposed below the first conductive terminal and overlapping with the first conductive terminal, the first conductive auxiliary pattern being coupled to the second conductive terminal, and a second conductive auxiliary pattern disposed below the second conductive terminal and overlapping with the second conducive terminal, the second conductive auxiliary pattern being coupled to the first conductive terminal.