PCB Boundary Wiring Structure to Suppress Fine-Pitch Peeling
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Solution Overview
Problem
Fine pitch circuits in printed circuit boards are prone to peeling at the boundary between wiring and non-wiring areas due to lateral forces during the semi-additive process, especially when the aspect ratio is high, leading to potential short circuits, disconnections, and contamination risks.
Innovation Solution
The printed circuit board design includes outermost boundary wiring portions with an average thickness of 40 μm or more and an average width of 30 μm or more, formed on the boundary between wiring and non-wiring areas, along with a method that involves layering a seed layer, forming a resist pattern, and peeling steps to enhance adhesion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If fine pitch wiring portions are formed by semi-additive process, then wiring density is improved, but peeling resistance at boundary areas deteriorates
Solution Approach 1:
The patent applies different thickness specifications to different wiring portions based on their location. Outermost boundary wiring portions are designed with thickness of 40 μm or more, while inner wiring portions have thickness of 10 μm or more. This local differentiation provides enhanced peeling resistance at vulnerable boundary areas while maintaining fine pitch and high density in the overall circuit design.
2Strength
If outermost boundary wiring portion thickness is increased to 40 μm or more, then peeling resistance is improved, but material consumption increases
Solution Approach 1:
The patent strategically concentrates the increased material thickness (40 μm or more) only at the outermost boundary wiring portions where peeling resistance is critical. The inner wiring portions maintain the standard thickness of 10 μm or more, thus optimizing material distribution to provide enhanced protection where needed while controlling overall material consumption.
3Stability of the object's composition
If outermost boundary wiring portion width is increased to 30 μm or more, then structural stability is improved, but wiring density deteriorates
Solution Approach 1:
The patent applies the increased width specification (30 μm or more) specifically to outermost boundary wiring portions to enhance their structural stability and prevent peeling. Inner wiring portions maintain narrower widths to preserve high wiring density in the circuit area. This localized approach ensures structural integrity at boundaries while maintaining overall circuit density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses peeling of the outermost boundary wiring portions, even under high aspect ratios, reducing the risk of short circuits and contamination, and maintaining circuit integrity.
Implementation Method 1
a metal layer is selectively formed only on the circuit portion by electroplating
Data Source
AI summary
A printed circuit board includes: an insulating base film; and a plurality of wiring portions formed on a surface of the base film. The wiring portions include a seed layer directly or indirectly layered on the surface of the base film and a metal layer layered on the seed layer. The base film has a wiring area including the plurality of wiring portions and a non-wiring area not including the wiring portions. The plurality of wiring portions include at least one outermost boundary wiring portion and a plurality of inner wiring portions. The outermost boundary wiring portion is formed on an outermost-side of the base film in the wiring area and at a boundary between the wiring area and the non-wiring area. An average thickness of the outermost boundary wiring portion is 40 μm or more. An average width of the outermost boundary wiring portion is 30 μm or more.