PCB Connection Structure With Embedded Capacitor for Die-to-Die Links
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing printed circuit boards face challenges in efficiently performing die-to-die interconnection for multi-chip packages, particularly in high-performance applications like server products with increased CPU and GPU cores, requiring improved connection structures for reliability and yield.
Innovation Solution
A printed circuit board design incorporating a substrate with a first insulating layer, first wiring layers, and via layers, along with a connection structure featuring a capacitor portion, passivation layer, and wiring portion, including alternating metal and dielectric layers, and connecting metals to facilitate die-to-die interconnection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a connection structure is added to perform die-to-die interconnection, then the functionality is improved, but the device complexity increases
Solution Approach 1:
The connection structure merges multiple functions into a single integrated component. The capacitor portion with alternating metal and dielectric layers provides both capacitive function and structural support, while the passivation layer and wiring portion integrate signaling and interconnection functions. This consolidation enables die-to-die interconnection without proportionally increasing overall device complexity.
Solution Approach 2:
The connection structure is designed with multi-functionality to address various requirements simultaneously. The capacitor portion serves both as an electrical component and as part of the interconnection pathway, while the passivation layer provides both insulation and mechanical protection. This universal design allows a single structure to perform multiple roles in the die-to-die interconnection system.
2Reliability
If the connection structure includes multiple alternating metal and dielectric layers, then the interconnection reliability is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The connection structure segments the interconnection pathway into distinct alternating layers of metal and dielectric materials. Each layer can be manufactured and controlled independently with standard tolerances, rather than requiring a single complex high-precision structure. This segmentation allows each layer to be optimized separately, improving overall reliability without excessively increasing manufacturing precision requirements.
Solution Approach 2:
The connection structure employs composite materials with alternating metal and dielectric layers, each contributing specific properties. The metal layers provide conductivity and structural integrity, while the dielectric layers provide insulation and mechanical stability. This composite approach distributes the reliability requirements across multiple material properties rather than demanding extreme precision from a single material system.
3Ease of manufacture
If insulating materials are disposed on the same level as metal layers, then the manufacturing process is simplified, but the device complexity increases
Solution Approach 1:
The insulating materials are merged with the metal layers to form an integrated capacitor portion structure. Rather than being separate components requiring additional assembly steps, the insulating materials are disposed at the same level as metal layers during the same manufacturing process, creating a unified multi-layer structure that simplifies production while achieving the desired electrical isolation and capacitive function.
Data Source
AI summary
A printed circuit board includes a substrate portion including a first insulating layer, s first wiring layers disposed on or within the first insulating layer, and a first via layer penetrating through at least a portion of the first insulating layer to connect the first wiring layers to each other, and a connection structure disposed within the substrate portion and including a capacitor portion, a passivation layer covering the capacitor portion, and a wiring portion disposed on the passivation layer.