PCB Substrate Crack-Load Testing With Nanoindentation

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Solution Overview

Problem

Existing reliability test methods for printed wiring board substrates, such as the temperature cycle test, require several weeks to several months, necessitating a simpler and more efficient evaluation method.

Innovation Solution

A reliability test method using a nanoindenter to measure the load at which cracks occur in printed wiring board substrates, specifically utilizing a Berkovich indenter to push into the resin cured product, particularly at the interface between the resin and glass cloth layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a temperature cycle test is performed to evaluate long-term reliability, then reliability assessment accuracy is improved, but testing time increases to several weeks or months

Engineering Contradiction:
Improvereliability assessment accuracyVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-inducing cracks in the printed wiring board substrate through controlled bending before reliability testing. This preparatory step creates initial damage that accelerates the testing process, allowing reliability assessment to be completed in a short period rather than requiring weeks or months of temperature cycle testing, thus resolving the contradiction between assessment accuracy and testing time

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the testing parameters by introducing a controlled bending parameter (repeated bending cycles) that accelerates crack formation and propagation. This parameter change transforms the testing approach from slow thermal cycling to rapid mechanical stress cycling, maintaining reliability assessment validity while reducing test duration from months to days or hours

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If the number of build-up layers is increased to achieve higher integration, then functional capability is improved, but stress from thermal expansion differences increases causing more cracks

Engineering Contradiction:
Improveintegration capabilityVSAvoidsubstrate strength
Core Design Contradiction:
Adaptability or versatilityVSStrength

Solution Approach 1:

The patent applies preliminary action by pre-inducing cracks through controlled bending before reliability testing. This accelerates the detection of strength issues in highly integrated substrates with multiple build-up layers, allowing rapid identification of thermal expansion stress problems without requiring lengthy testing of fully assembled high-integration boards

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies local quality by focusing the bending stress on specific regions of the printed wiring board substrate where build-up layers are present. This localized stress application targets the areas most susceptible to thermal expansion differences, enabling efficient detection of strength issues in high-integration designs without compromising overall functional capability

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables rapid evaluation of substrate reliability by measuring crack occurrence loads, reducing the testing time significantly and providing a correlation with long-term reliability under temperature fluctuations.

Implementation Method 1

measuring a load at which a crack occurs in the printed wiring board substrate, using a nanoindenter

Methodology Applied
Scientific EffectFracture Mechanics: Fracture Mechanics

Data Source

PatentEP4700359A1Printed circuit board substrate reliability testing method
Publication Date: 2026.02.25 RESONAC CORP
  • EP4700359A1 patent drawingFigure 1~2
  • EP4700359A1 patent drawingFigure 3~4
  • EP4700359A1 patent drawingFigure 5~6

AI summary

A reliability test method for a printed wiring board substrate includes measuring a load at which a crack occurs in the printed wiring board substrate using a nanoindenter.