PCB Dipole Antenna Coupling Layout for Low-Band Return Loss
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Solution Overview
Problem
Dipole antennas with parasitic elements experience interference and degraded return loss characteristics in multi-band arrays, particularly when low band elements are positioned above mid or high band elements, leading to distorted radiation patterns and complex PCB tuning.
Innovation Solution
A capacitive coupling arrangement with a conductive strip on a PCB, positioned parallel to the dipole arm, forms a capacitive coupling element with a low cross-sectional area, reducing parasitic effects on return loss by limiting the capacitive coupling to the thickness of the PCB, thereby minimizing interference with higher band elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a parasitic element is added to increase bandwidth, then the frequency bandwidth is improved, but the return loss characteristics are degraded when placed in a multi-band array
Solution Approach 1:
The patent reorients the parasitic element from a horizontal orientation (parallel to the reflector) to a vertical orientation (perpendicular to the reflector). This dimensional change reduces the cross-sectional area of the parasitic element as viewed from above, minimizing its parasitic effects on mid and high band elements positioned below it in the array, while still achieving bandwidth enhancement through capacitive coupling.
2Adaptability or versatility
If a large parasitic element is used to enhance low band performance, then the low band bandwidth is improved, but interference with mid and high band signals increases
Solution Approach 1:
The patent applies local quality by making the parasitic element's cross-sectional area specifically small in the horizontal plane (where it would interfere with elements below it) while maintaining sufficient vertical extent to provide capacitive coupling for low band enhancement. This localized optimization allows the parasitic element to fulfill its low band function without generating harmful interference effects on mid and high band signals.
3Reliability
If the parasitic element is oriented parallel to the reflector, then the capacitive coupling is maximized, but the conductive cross-sectional area is increased causing more interference
Solution Approach 1:
The patent changes the orientation of the parasitic element from horizontal (parallel to reflector) to vertical (perpendicular to reflector). This reorientation maintains the capacitive coupling function by preserving the parallel arrangement between the parasitic element and the dipole arms along the vertical dimension, while dramatically reducing the horizontal cross-sectional area that causes interference with elements positioned below in the array.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution achieves broad bandwidth return loss in the low frequency range while maintaining acceptable return loss for smaller mid or high band elements, ensuring symmetrical radiation patterns and simplified PCB tuning.
Implementation Method 1
A capacitive coupling arrangement with a conductive strip on a PCB, positioned parallel to the dipole arm, forms a capacitive coupling element with a low cross-sectional area
Data Source
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AI summary
In a dipole antenna, a capacitive coupling element is introduced in the form of a conductive strip and is placed in parallel with the dipole conductive strip of the dipole arm. To that end, the conductive strip of the capacitive element is formed on a first copper layer of the PCB in parallel to an extended conductive strip of a dipole arm, that is also disposed on the first copper layer of the PCB. The conductive strip of the capacitive element extends horizontally from the center of the dipole arm in an equal distant on each side. A capacitive plate is placed on the second copper layer of the PCB on the opposite side of the first copper layer and is coupled to the conductive strip of the capacitive element via a plated through hole. The capacitive plate placed on the second copper layer extends downwardly so that a portion of it overlaps with the dipole conductive strip located on the first copper layer forming the capacitance coupling element.