Printed Wiring Board Embedded Circuit Surface Treatment
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Solution Overview
Problem
Existing printed wiring boards face issues with insulation reliability and conductor layer disconnection due to roughened side surfaces and lower surfaces of conductor circuits, particularly when line widths are less than 2.5 μm or greater than 7.5 μm, leading to stress concentration and cracking, which affects the integrity of the resin insulating layer and conductor connections.
Innovation Solution
A printed wiring board design featuring a first resin insulating layer with concave portions for embedded first conductor circuits, a second conductor layer with roughened side and back surfaces, and a second resin insulating layer covering the second conductor layer, where the first conductor circuits have line widths between 2.5 μm and 7.5 μm with non-roughened side and lower surfaces, and the second conductor circuits have line widths greater than 10 μm with roughened surfaces, to optimize strength and prevent cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the side surfaces and lower surfaces of conductor circuits are roughened to improve adhesion, then adhesion strength is improved, but cracking and disconnection occur leading to reduced insulation reliability
Solution Approach 1:
The invention applies different surface treatments to different parts of the conductor circuits: the upper surfaces (exposed surfaces) are roughened to improve adhesion, while the side surfaces and lower surfaces (embedded in resin) are kept smooth to prevent cracking. This local differentiation resolves the contradiction by providing adhesion where needed without inducing stress concentration that leads to failure.
2Productivity
If the line width of conductor circuits is reduced to increase circuit density, then circuit density is improved, but the conductor circuits become more prone to cracking and disconnection
Solution Approach 1:
By keeping the side surfaces and lower surfaces smooth while only roughening the upper surfaces, the invention enables thinner conductor circuits (2.5 μm to 7.5 μm line width) to be formed without cracking. The smooth embedded surfaces prevent stress concentration in narrow conductors, allowing high circuit density while maintaining reliability.
3Productivity
If spaces between conductor circuits are reduced to increase circuit density, then circuit density is improved, but stress concentration increases leading to cracking
Solution Approach 1:
The smooth side surfaces of conductor circuits reduce stress concentration in narrow spaces between circuits. This local surface quality control allows narrower spacing between circuits while preventing the stress concentration that would otherwise cause cracking and maintain conductor layer strength.
4Strength
If all surfaces of conductor circuits are roughened uniformly, then adhesion is improved, but manufacturing precision is reduced due to stress concentration and cracking
Solution Approach 1:
The invention selectively roughens only the upper surfaces of conductor circuits while keeping side and lower surfaces smooth. This local differentiation enables precise control of line widths (2.5 μm to 7.5 μm) by preventing stress concentration during manufacturing, while still providing adequate adhesion through upper surface roughening.
Data Source
AI summary
A printed wiring board includes a first insulating layer having concave portions on first surface of the first insulating layer, a first conductor layer including first circuits formed in the concave portions, a second conductor layer including second circuits on second surface of the first insulating layer, a first via conductor connecting the first and second conductor layers, and a second insulating layer formed on the second surface of the first insulating layer and covering the second conductor layer. Each first circuit has upper, lower and side surfaces such that the upper surface is exposed from the first insulating layer and the side and lower surfaces are not roughened surfaces, each second circuit has top, back and side surfaces such that the side and back surfaces are roughened surfaces, and a thinnest first circuit has a line width L1 smaller than a line width L2 of a thinnest second circuit.