PCB Equipotential Plane Layout for Signal and Power Integrity
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Solution Overview
Problem
Existing printed circuit boards (PCBs) and semiconductor packages face challenges in achieving miniaturization, multifunctionality, and high efficiency while maintaining reliability due to limitations in electrical connectivity and signal integrity.
Innovation Solution
The PCB design incorporates a substrate base with equipotential planes, equipotential plating lines, signal plating lines, and upper connection pads, featuring etchback openings and gaps that allow for improved electrical connections through equipotential plating lines extending through etchback gaps, enhancing signal integrity and power integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If conventional PCB designs are used for miniaturization, then device size is reduced, but signal integrity and power integrity deteriorate
Solution Approach 1:
The equipotential plane is divided into a main equipotential plane and multiple sub-equipotential planes, with each serving specific functions. The segmentation allows for optimized electrical pathways while reducing overall space requirements, thereby maintaining signal integrity in miniaturized devices.
Solution Approach 2:
The patent utilizes vertical stacking of equipotential planes and sub-equipotential planes at different heights, creating three-dimensional electrical pathways. This dimensional approach reduces the lateral area occupied by conductive elements while maintaining effective electrical connections for signal and power integrity.
2Reliability
If more conductive elements are added to improve electrical connectivity, then signal integrity improves, but area occupied by conductive elements increases
Solution Approach 1:
The patent transitions from two-dimensional planar conductive elements to three-dimensional stacked structures. Multiple equipotential planes and sub-equipotential planes are arranged vertically, providing enhanced electrical connectivity while occupying reduced lateral area on the PCB surface.
Solution Approach 2:
Sub-equipotential planes are nested within or adjacent to the main equipotential plane structure, creating a compact hierarchical arrangement. This nesting allows multiple conductive elements to share space efficiently, improving electrical connectivity without proportionally increasing the occupied area.
3Reliability
If equipotential planes are extended to improve power integrity, then power distribution improves, but device complexity increases
Solution Approach 1:
The equipotential plane is segmented into a main equipotential plane and multiple sub-equipotential planes, where each segment serves specific power distribution functions. This segmentation enables improved power integrity through multiple pathways while maintaining manageable structural complexity through modular design.
Data Source
AI summary
A printed circuit board includes a substrate base, a plurality of substrate wiring patterns on an upper surface and a lower surface of the substrate base, the plurality of substrate wiring patterns including at least one equipotential plane, a plurality of equipotential plating lines, a plurality of signal plating lines, and a plurality of upper connection pads on the upper surface of the substrate base, the at least one equipotential plane including at least one main equipotential plane and a plurality of sub-equipotential planes, a plurality of upper pad layers covering at least portions of the plurality of upper connection pads, and an upper solder resist layer covering a portion of the upper surface of the substrate base and portions of the plurality of substrate wiring patterns, wherein the upper solder resist layer includes a plurality of etchback openings arranged in a column in a first lateral direction.