PCB Gold Plating Layout for Wire Bonding and Soldering
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing printed circuit boards (PCBs) face inefficiencies due to the same thickness of upper and lower conductive layers, leading to increased gold consumption and product thickness, as well as reliability issues with oxidation and interface problems between copper and nickel layers.
Innovation Solution
A method for manufacturing PCBs with upper and lower conductive layers of different thicknesses using a plating seed layer, where the layers are formed after preprocessing patterns with varying curvatures, allowing for gold plating directly on copper without a nickel intermediate, thereby reducing gold consumption and improving electrical conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If the upper and lower conductive layers are formed with the same thickness, then the manufacturing process is simplified, but gold consumption increases and product thickness increases
Solution Approach 1:
The patent applies different thicknesses to different conductive layers based on their specific functions. The upper conductive layer (for wire bonding) has a thickness of 0.03-0.08 μm, while the lower conductive layer (for soldering) has a thickness of 0.003-0.008 μm. This local differentiation optimizes gold usage by providing sufficient thickness only where required for electrical performance and bonding reliability, rather than uniformly thickening all layers.
2Ease of manufacture
If the upper and lower conductive layers are formed with the same thickness, then the plating process is simplified, but the product thickness increases
Solution Approach 1:
The patent implements differential thickness design where the upper conductive layer thickness (0.03-0.08 μm) and lower conductive layer thickness (0.003-0.008 μm) are independently controlled according to functional requirements. This reduces overall product thickness by eliminating excessive material in non-critical areas while maintaining sufficient thickness for wire bonding and soldering applications.
3Reliability
If a nickel intermediate layer is used between copper and gold, then oxidation resistance is improved, but the layer structure becomes more complex and interface problems arise
Solution Approach 1:
The patent removes the nickel intermediate layer from the traditional copper-nickel-gold structure, directly plating gold on copper. This simplifies the layer structure from three layers to two layers, eliminating nickel-related interface problems such as stress, delamination, and additional oxidation risks at the nickel-copper interface, while maintaining oxidation resistance through proper gold plating techniques.
4Ease of manufacture
If the conductive layers are formed with uniform thickness, then the manufacturing process is simpler, but reliability for different applications (wire bonding and soldering) is compromised
Solution Approach 1:
The patent optimizes conductive layer thickness according to specific application requirements: the upper conductive layer (0.03-0.08 μm) is designed for wire bonding with sufficient thickness to ensure bonding strength and electrical performance, while the lower conductive layer (0.003-0.008 μm) is designed for soldering with appropriate thickness for solder wetting and mechanical attachment. This function-based differentiation enhances reliability for each specific application.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces gold consumption, minimizes oxidation, enhances structural reliability, and improves manufacturing efficiency by allowing for simultaneous formation of conductive layers with specific thicknesses tailored for wire bonding and soldering applications.
Implementation Method 1
A method for manufacturing PCBs with upper and lower conductive layers of different thicknesses using a plating seed layer, where the layers are formed after preprocessing patterns with varying curvatures, allowing for gold plating directly on copper without a nickel intermediate
Data Source
AI summary
A printed circuit board according to an embodiment includes: an insulating layer; a first pad disposed on a first surface of the insulating layer; a first conductive layer disposed on the first pad and including gold (Au); a second pad disposed on a second surface of the insulating layer; and a second conductive layer disposed on the second pad and including gold (Au), wherein the first conductive layer is a conductive layer connected to a wire, the second conductive layer is a conductive layer connected to a solder, and the first conductive layer is thicker than the second conductive layer.