PCB Ground Layer Mesh Design for EMI Reduction

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Solution Overview

Problem

Switching harmonic noise between an inductor in a circuit package and a power layer of a printed circuit board (PCB) causes electromagnetic interference (EMI) and radio frequency interference (RFI), leading to throughput degradation and digital signal quality deterioration.

Innovation Solution

A ground layer with a mesh area substantially void along the contour of the inductor is placed between the inductor and the power layer to reduce Eddy current and capacitive and inductive coupling, maintaining desired inductance without increasing system height.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If a solid ground layer is placed between the inductor and the power layer to block harmonic noise, then electromagnetic interference is reduced, but Eddy current is induced which reduces the inductance of the inductor

Engineering Contradiction:
Improveelectromagnetic interferenceVSAvoidinductance
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The ground layer is segmented into a mesh pattern with void areas instead of being a solid continuous layer. This segmentation breaks up the ground layer into discrete conductive regions separated by non-conductive spaces, which reduces Eddy current paths while maintaining EMI shielding effectiveness through the distributed ground structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The ground layer has different properties in different regions: solid ground areas provide EMI shielding and reference planes, while void areas along the inductor contour minimize Eddy current induction. This local variation in ground layer continuity allows simultaneous optimization of EMI protection and inductance maintenance.

Inventive Principle:
Principle #3Local quality

2Reliability

If the distance between the solid ground layer and the inductor is increased to reduce Eddy current, then inductance is maintained, but the z-height of the electronic apparatus increases and manufacturing cost increases

Engineering Contradiction:
ImproveinductanceVSAvoidz-height
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The ground layer is segmented into a mesh pattern with void areas instead of being a solid continuous layer. This segmentation breaks up the ground layer into discrete conductive regions separated by non-conductive spaces, which reduces Eddy current paths while maintaining EMI shielding effectiveness through the distributed ground structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The ground layer's physical configuration is changed from solid to mesh pattern, altering its electromagnetic properties. This parameter change allows the ground layer to maintain EMI shielding effectiveness while reducing Eddy current induction, thereby maintaining inductance at the original z-height without increasing device thickness.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If switching harmonic noise is reduced between the inductor and power layer, then EMI and RFI are minimized, but the complexity of PCB design increases

Engineering Contradiction:
Improveswitching harmonic noiseVSAvoidPCB design
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The ground layer is segmented into a mesh pattern with void areas instead of being a solid continuous layer. This segmentation breaks up the ground layer into discrete conductive regions separated by non-conductive spaces, which reduces Eddy current paths while maintaining EMI shielding effectiveness through the distributed ground structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The ground layer has different properties in different regions: solid ground areas provide EMI shielding and reference planes, while void areas along the inductor contour minimize Eddy current induction. This local variation in ground layer continuity allows simultaneous optimization of EMI protection and inductance maintenance.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves inductance and reduces interference, enhancing the performance of electronic apparatuses by minimizing EMI and RFI, suitable for small form-factor devices like tablets and IoT devices.

Implementation Method 1

due to close proximity of the inductor and the ground layer, e.g., 200 μm to 300 μm, Eddy current may be induced, which may reduce the inductance (L) of the inductor

Methodology Applied
Scientific EffectEddy current: Eddy Currents

Implementation Method 2

switching harmonic noise may exist between an inductor of a VR within a circuit package and a power layer of a PCB. Such switching harmonic noise may cause electromagnetic interference (EMI) and radio frequency interference (RFI)

Methodology Applied
Scientific EffectElectromagnetic interference: Electromagnetic Induction

Implementation Method 3

The mesh area within the ground layer of the PCB may reduce Eddy current induced by the inductor, and may further reducing capacitive and inductive coupling between the inductor and the ground layer of the PCB

Methodology Applied
Scientific EffectCapacitive coupling: Capacitance

Implementation Method 4

The mesh area within the ground layer of the PCB may reduce Eddy current induced by the inductor, and may further reducing capacitive and inductive coupling between the inductor and the ground layer of the PCB

Methodology Applied
Scientific EffectInductive coupling: Electromagnetic Induction

Data Source

PatentUS10454163B2Ground layer design in a printed circuit board (PCB)
Publication Date: 2019.10.22 INTEL CORP
  • US10454163B2 patent drawing
  • US10454163B2 patent drawing
  • US10454163B2 patent drawing

AI summary

Embodiments include apparatuses, methods, and systems including an electronic apparatus including an inductor within a circuit package affixed to a printed circuit board (PCB) having a ground layer, where the ground layer includes a mesh area that is substantially void along a contour of the inductor. An electronic apparatus may include a circuit package with an inductor, and a PCB, where the circuit package may be affixed to the PCB. The PCB may have a plurality of layers including a ground layer and a power layer, where the ground layer may be between the power layer and the inductor. The ground layer may include a mesh area that may be substantially void along a contour of the inductor within the circuit package. Other embodiments may also be described and claimed.