PCB Vertical Interconnect Layout for PTH Stub Reduction
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Solution Overview
Problem
Conventional Type-3 printed circuit boards (PCBs) with plated through hole (PTH) stubs cause significant signal degradation and impedance discontinuities, leading to reduced performance in high-speed applications like DDR5 and 40 Gbps TBT4, and alternative solutions like Type-4 HDI PCBs or split core designs incur higher costs or signaling degradation.
Innovation Solution
A printed circuit board design with paired plated through hole vias separated by vertical separators and embedded connector traces forms a serpentine signaling pathway, minimizing unused stub effects and reducing impedance discontinuities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional Type-3 PCB with PTH stubs is used, then manufacturing cost is reduced, but signal integrity deteriorates due to impedance discontinuities and reflection noises
Solution Approach 1:
The patent extracts and removes the harmful PTH stub portions from the signal path by using blind vias instead of through-hole vias. The via structures are configured to terminate at specific layers rather than penetrating through the entire PCB, thereby eliminating the unused conductive portions that cause impedance discontinuities and signal degradation while maintaining the cost-effective Type-3 PCB manufacturing process.
Solution Approach 2:
The patent segments the via structure into blind vias that terminate at specific PCB layers rather than forming continuous through-holes. This segmentation creates controlled via lengths and positions, allowing the signal path to avoid the harmful stub effects while maintaining compatibility with conventional Type-3 PCB manufacturing processes.
2Reliability
If Type-4 HDI PCB is used to eliminate PTH stubs, then signal integrity is improved, but manufacturing cost increases
Solution Approach 1:
The patent employs a cost-effective approach by using blind vias with controlled lengths in a Type-3 PCB structure rather than expensive Type-4 HDI PCB. This solution provides sufficient signal integrity improvement without requiring the more complex and expensive HDI manufacturing process, effectively using a simpler, cheaper structure that achieves the desired performance.
3Reliability
If split core PCB design is used to reduce PTH stub impact, then stub reflection is reduced, but crosstalk coupling increases due to asymmetry dielectric stack-up
Solution Approach 1:
The patent applies local quality by using blind vias with specific termination points at different PCB layers. This localized via configuration allows selective termination of via structures where needed to eliminate stub effects without requiring the asymmetric split core design, thereby avoiding the crosstalk issues that arise from asymmetric dielectric stack-ups while still reducing stub reflections.
Data Source
AI summary
The present disclosure is directed to a printed circuit board having a first surface and providing a signal pathway using a plurality of plated through hole (PTH) vias including a first set of PTH vias having a first PTH via coupled to a second PTH via and a first vertical separator being configured therebetween, with the first vertical separator extending a first depth from the first surface, and a second set of PTH vias having a third PTH via coupled to a fourth PTH via and a second vertical separator being configured therebetween, with the second vertical separator extending a second depth from the first surface, and a connector trace coupling the second PTH via to the third PTH via being positioned at a third depth from the first surface, for which the third depth is less than the first depth or the second depth.