PCB Interstitial Vias with Recessed Copper Ends
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Solution Overview
Problem
Existing multi-level printed circuit boards face challenges in efficiently making electrical contact from the upper surface to underlying conductors due to high yield and cost burdens associated with positive and negative etch back features, which are not typically found in commercial products.
Innovation Solution
A method involving forming an aperture through overlying electrical conductors, etching recesses in the conductor ends, and creating an electrical conductive via with distal portions projecting into these recesses, enhancing mechanical barrel bond strength and reducing copper dish-down defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If positive or negative etch back features are used to make electrical contact, then electrical connection is achieved, but yield and cost burden increase significantly
Solution Approach 1:
The patent applies preliminary action by forming recesses in the inner-layer copper foil before plating the via. This pre-prepared recess structure allows the electroless and anodic copper to properly penetrate and bond without requiring extreme etch back features, thereby achieving reliable electrical connection while avoiding the yield and cost penalties associated with aggressive etching processes
2Reliability
If extreme positive or negative etch back features are applied, then electrical contact is established, but additional process requirements increase cost and reduce yield
Solution Approach 1:
The recesses are formed in advance in the inner-layer copper foil, creating a prepared receptacle for the via copper. This preliminary structuring eliminates the need for extreme positive or negative etch back features, thereby establishing reliable electrical contact while avoiding additional complex process steps and reducing manufacturing cost
Solution Approach 2:
The patent applies local quality by creating recesses specifically at the inner-layer copper foil interface where the via will connect. This localized modification provides the necessary geometry for reliable electrical contact only where needed, rather than requiring extreme etch back across the entire board, thereby simplifying the overall manufacturing process
3Ease of manufacture
If standard via formation is used, then manufacturing is simpler, but mechanical barrel bond strength is insufficient and copper dish-down defects occur
Solution Approach 1:
The patent applies local quality by forming recesses specifically at the inner-layer copper foil where the via will connect. This localized geometric modification concentrates the bonding interface area, significantly improving mechanical barrel bond strength without requiring changes to the overall via formation process or introducing complex manufacturing steps
4Ease of manufacture
If standard via formation is used, then manufacturing is simpler, but copper dish-down defects increase in thin layer resin rich substrate constructions
Solution Approach 1:
The recesses formed in the inner-layer copper foil provide a localized geometric feature that prevents copper dish-down defects. By creating this localized receptacle structure at the critical interface area, the patent maintains manufacturing simplicity while achieving precise control over copper distribution and eliminating dish-down defects in thin layer resin rich substrate constructions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves pin-to-via retention force, reduces inner-layer copper defects, and increases mechanical bond strength, making it suitable for micro-press-fit connectors and extending via life in thin layer resin rich substrate constructions.
Implementation Method 1
Electro-less and anodic copper is then plated to the resin barrel on the via and also over-plates the protruding (so called positive) tongue
Implementation Method 2
Electro-less and anodic copper is then plated to the resin barrel on the via and also over-plates the protruding (so called positive) tongue
Implementation Method 3
The positive feature is produced by removing resin from the hole wall until the inner-layer copper foil (i.e., the underlying electrical conductor) protrudes as a tongue into the hole
Implementation Method 4
Negative etch back is produced by etching inner-layer copper foil away from the hole wall so that the edges of the foil are recessed inwardly from the walls of the drilled hole
Data Source
AI summary
A printed circuit board having interstitial vias. The printed circuit board has a plurality of overlying electrical conductors disposed within an inner region of the printed circuit board. The overlying electrical conductors are separated by dielectric material. The printed circuit board has an aperture passing through a portion of the plurality of overlying electrical conductors printed circuit board. The overlying electrical conductors have ends with recesses therein. An electrical conductive via passes through the aperture with distal portions of the via projecting into the recesses.